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Analysis of the LIGBT-based ESD Protection Circuit with Latch-up Immunity and High Robustness

래치-업 면역과 높은 감내 특성을 가지는 LIGBT 기반 ESD 보호회로에 대한 연구

  • Received : 2014.10.15
  • Accepted : 2014.10.24
  • Published : 2014.11.01

Abstract

Electrostatic discharge has been considered as a major reliability problem in the semiconductor industry. ESD reliability is an important issue for these products. Therefore, each I/O (Input/Output) PAD must be designed with a protection circuitry that creates a low impedance discharge path for ESD current. This paper presents a novel Lateral Insulated Gate Bipolar (LIGBT)-based ESD protection circuit with latch-up immunity and high robustness. The proposed circuit is fabricated by using 0.18 um BCD (bipolar-CMOS-DMOS) process. Also, TLP (transmission line pulse) I-V characteristic of proposed circuit is measured. In the result, the proposed ESD protection circuit has latch-up immunity and high robustness. These characteristics permit the proposed circuit to apply to power clamp circuit. Consequently, the proposed LIGBT-based ESD protection circuit with a latch-up immune characteristic can be applied to analog integrated circuits.

Keywords

References

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