IEIE Transactions on Smart Processing and Computing

대한전자공학회 (The Institute of Electronics and Information Engineers)
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Output Noise Reduction Technique Based on Frequency Hopping in a DC-DC Converter for BLE Applications

  • Park, Ju-Hyun (College of Information and Communication Engineering, Sungkyunkwan University) ;
  • Kim, Sung Jin (College of Information and Communication Engineering, Sungkyunkwan University) ;
  • Lee, Joo Young (College of Information and Communication Engineering, Sungkyunkwan University) ;
  • Park, Sang Hyeon (College of Information and Communication Engineering, Sungkyunkwan University) ;
  • Lee, Ju Ri (College of Information and Communication Engineering, Sungkyunkwan University) ;
  • Kim, Sang Yun (College of Information and Communication Engineering, Sungkyunkwan University) ;
  • Kim, Hong Jin (College of Information and Communication Engineering, Sungkyunkwan University) ;
  • Lee, Kang-Yoon (College of Information and Communication Engineering, Sungkyunkwan University)
  • 투고 : 2015.07.21
  • 심사 : 2015.09.29
  • 발행 : 2015.10.31
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초록

In this paper, a different type of pulse width modulation (PWM) control scheme for a buck converter is introduced. The proposed buck converter uses PWM with frequency hopping and a low quiescent.current low dropout (LDO) voltage regulator with a power supply rejection ratio enhancer to reduce high spurs, harmonics and output voltage ripples. The low quiescent.current LDO voltage regulator is not described in this paper. A three-bit binary-to-thermometer decoder scheme and voltage ripple controller (VRC) is implemented to achieve low voltage ripple less than 3mV to increase the efficiency of the buck converter. An internal clock that is synchronized to the internal switching frequency is used to set the hopping rate. A center frequency of 2.5MHz was chosen because of the bluetooth low energy (BLE) application. This proposed DC-DC buck converter is available for low-current noise-sensitive loads such as BLE and radio frequency loads in portable communications devices. Thus, a high-efficiency and low-voltage ripple is required. This results in a less than 2% drop in the regulator's efficiency, and a less than 3mV voltage ripple, with -26 dBm peak spur reduction operating in the buck converter.

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참고문헌

  1. J. Balcells et al., "EMI Reduction in Switched Power Converters Using Frequency Modulation Techniques," IEEE Trans. Electromagn. Compat., vol.47, no. 3, Aug., 2005.
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  7. Kun-Chun Chang et al., "A Fast Hysteretic Buck DCDC converter with Start-up Overshoot Suppression technique" 2012 Asia Pacific Conference on Postgraduate research in Microelectronics and Electronics (PrimeAsia), pp. 56-60, Dec. 2012.
  8. Y. P. Su et al., "A Pseudo-Noise Coded Constant-offtime( PNT-COT) Control Switching Converter with Maximum 18.7dBm Peak Spur Reduction and 92% Efficiency in 40nm CMOS" 2013 Symposium on VLSI Circuits Digest of Technical Papers, pp. c170-c171, Jun. 2013.
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피인용 문헌

  1. A Design of a 92.4% Efficiency Triple Mode Control DC–DC Buck Converter With Low Power Retention Mode and Adaptive Zero Current Detector for IoT/Wearable Applications vol.32, pp.9, 2017, https://doi.org/10.1109/TPEL.2016.2623812