JSTS:Journal of Semiconductor Technology and Science

The Institute of Electronics and Information Engineers (대한전자공학회)
권호 표지
DOI QR코드

DOI QR Code

Efficient Algorithm and Architecture for Elliptic Curve Cryptographic Processor

  • Nguyen, Tuy Tan (Dept. of Information and Communication Engr., Inha University) ;
  • Lee, Hanho (Dept. of Information and Communication Engr., Inha University)
  • Received : 2015.09.07
  • Accepted : 2015.12.24
  • Published : 2016.02.28
Download PDF
⟨ Previous Next ⟩

Abstract

This paper presents a new high-efficient algorithm and architecture for an elliptic curve cryptographic processor. To reduce the computational complexity, novel modified Lopez-Dahab scalar point multiplication and left-to-right algorithms are proposed for point multiplication operation. Moreover, bit-serial Galois-field multiplication is used in order to decrease hardware complexity. The field multiplication operations are performed in parallel to improve system latency. As a result, our approach can reduce hardware costs, while the total time required for point multiplication is kept to a reasonable amount. The results on a Xilinx Virtex-5, Virtex-7 FPGAs and VLSI implementation show that the proposed architecture has less hardware complexity, number of clock cycles and higher efficiency than the previous works.

Keywords

References

  1. G. D. Sutter, J.-P. Deschamps, and J. L. Imana, "Efficient Elliptic Curve Point Multiplication using Digit-Serial Binary Field Operations," IEEE Trans. on Industrial Electronics, vol. 60, no.1, pp. 217-225, Jan. 2013. https://doi.org/10.1109/TIE.2012.2186104
  2. N. Koblitz, A. Menezes, and S. Vanstone, "The state of elliptic curve cryptography," Des. Codes Cryptography, vol. 19, no. 2-3, pp. 173-193, Mar. 2000. https://doi.org/10.1023/A:1008354106356
  3. R. Hankerson, A. Menezes, and S. Vanstone, Guide to Elliptic Curve Cryptography. New York: Springer-Verlag, 2004.
  4. J.-P. Deschamps, J. L. Imana, and G. D. Sutter, Hardware Implementation of Finite-Field Arithmetic. New York: McGraw-Hill, 2009, ser. Electronic Engineering Series.
  5. W. N. Chelton and M. Benaissa, "Fast elliptic curve cryptography on FPGA," IEEE Trans. on Very Large Scale Integrated (VLSI) Systems, vol. 16, no. 2, pp. 198-205, Feb. 2008. https://doi.org/10.1109/TVLSI.2007.912228
  6. F. Rodriguez-Henriquez, N. A. Saqib, and A. Diaz-Perez, "A fast parallel implementation of elliptic curve point multiplication over GF(2m)," Micro- process. Microsyst., vol. 28, no. 5-6, pp. 329-339, Aug. 2004, Special issue on FPGAs: Applications and Designs. https://doi.org/10.1016/j.micpro.2004.03.003
  7. S. M. Shohdy, A. B. El-Sisi, and N. Ismail, "FPGA implementation of elliptic curve point multiplication over $GF(2^{191})$," Proc. 3rd Int. Conf. Workshops Adv. ISA, Berlin, Heidelberg, Germany, pp. 619-634, Jun. 2009.
  8. H. Mahdizadeh and M. Masoumi, "Novel Architecture for Efficient FPGA Implementation of Elliptic Curve Cryptographic Processor Over $GF(2^{163})$," IEEE Trans. on Very Large Scale Integration (VLSI) Systems, vol. 21, no. 12, pp. 2330-2333, Dec. 2013. https://doi.org/10.1109/TVLSI.2012.2230410
  9. J.-C. Bajard, L. Imbert, and C. Negre, "Arithmetic Operations in Finite Fields of Medium Prime Characteristic Using the Lagrange Representation," IEEE Trans. on Computer, vol. 55, no. 9, pp. 1167-1177, Sep. 2006. https://doi.org/10.1109/TC.2006.136
  10. A. Hariri and A. Reyhani-Masoleh, "Bit-Serial and Bit-Parallel Montgomery Multiplication and Squaring over $GF(2^m)$," IEEE Trans. on Computer, vol. 58, no. 10, pp. 1332-1345, Oct. 2009. https://doi.org/10.1109/TC.2009.70
  11. C.W. Chiou, C.-Y. Lee, J.-M. Lin, T.-W. Hou, C.-C. Chang, "Concurrent error detection and correction in dual basis multiplier over $GF(2^m)$," IET Circuits, Devices & Systems, vol. 3, no. 1, pp. 22-40, Feb. 2009. https://doi.org/10.1049/iet-cds:20080122
  12. G. Meurice de Dormale and J.-J. Quisquater, "High-speed hardware implementations of elliptic curve cryptography: A survey," J. Syst. Archit., vol. 53, no. 2-3, pp. 72-84, Feb./Mar. 2007. https://doi.org/10.1016/j.sysarc.2006.09.002
  13. H. Li, K. Wu, G. Xu, H. Yuan and P. Luo, "Simple Power Analysis Attacks Using Chosen Message against ECC Hardware Implementations," IEEE World Congress on Internet Security, pp. 68-72, Feb. 2011.
  14. J. P. Deschamps, J. L. Imana, and G. D. Sutter,, "Hardware Implementation of Finite-Field Arithmetic" McGrawHill, ISBN 978-0-0715-4581-5, Mar. 2009.
  15. R. Azarderakhsh, K. U. Jarvinen, and M. M.-Kermani, "Efficient Algorithm and Architecture for Elliptic Curve Cryptography for Extremely Constrained Secure Application," IEEE Trans. on Circuits and Systems-I, vol. 64, no. 4, pp. 1144-1155, Apr. 2014.
  16. U. Kocabas, J. Fan, and I. Verbauwhede, "Implementation of binary Edwards curves for very-constrained devices," Proc. 21st Int. Conf. Application-Specific Systems Architectures and Processors (ASAP2010), pp. 185-191, Jul. 2010.
  17. Y. K. Lee, K. Sakiyama, L. Batina, and I. Verbauwhede, "Elliptic curve-based security processor for RFID," IEEE Trans. on Computer, vol.57, no. 11, pp. 1514-1527, Sep. 2008. https://doi.org/10.1109/TC.2008.148

Cited by

  1. A Low-Latency and Low-Complexity Point-Multiplication in ECC vol.65, pp.9, 2018, https://doi.org/10.1109/TCSI.2018.2801118
  2. ACryp-Proc: Flexible Asymmetric Crypto Processor for Point Multiplication vol.6, pp.2169-3536, 2018, https://doi.org/10.1109/ACCESS.2018.2828319