I. INTRODUCTION
Due to their cleanliness and sustainability, renewable energy sources are being employed worldwide out of consideration for environment-protection issues [1]-[10]. Generally speaking, the voltage levels of renewable energy sources, such as photovoltaic cells and fuel cells, are low. Thus, DC-DC converters that feature high step-up conversion have been widely utilized in such renewable energy systems to raise their voltage levels [11]-[15]. Fig. 1 shows a block diagram of a typical electric vehicle power management system. This kind of electric vehicle, powered by fuel cell stacks, is fueled with hydrogen and only emits water and heat without any pollutants. Referring to Fig. 1, the high step-up interleaved converters serving as DC/DC power converters are capable of converting the low levels of input voltage from fuel cell stacks into high levels of output voltage, which are then fed into a battery set or a DC/AC inverter for supplying a tractions motor with an AC load. Hence, high efficiency, high step-up DC/DC converters play an important role in this kind of power management system.
Fig. 1.Block diagram of a typical electric vehicle power management system.
The conventional DC/DC converters for raising voltage levels, such as boost converters and flyback converters, adopt an extremely high duty cycle or a high turns ratio of the coupled inductor to achieve a high voltage gain. Adopting an extremely high duty cycle in the step-up converters incurs large conduction losses and serious diode reverse-recovery problems. Due to the high voltage stresses that occur on the power devices, power switches with a low RDS(ON) and power diodes with a low reverse-recovery time cannot be employed in this type of high-step-up converter.
Some high-step-up converters that utilize coupled inductors and switched capacitors, which recycle the leakage-inductance energy and lower the voltage stresses, have been proposed in the literature [16]-[22]. This paper proposes a novel high-step-up interleaved converter with a built-in transformer and a voltage-multiplier circuit to raise the voltage gain of the presented converter and to lower the voltage stresses on the power devices. The presented converter features high step-up conversion, high circuit efficiency, a low input-current ripple, increased lifetime of the input renewable energy source, and it is suitable for electric vehicle power management applications. In addition, the built-in transformer and voltage-multiplier circuit extend the voltage gain and lower the voltage stresses. As a result, low-voltage-rated semiconductor devices (such as power MOSFETs and diodes) can be adopted in the presented converter. The key characteristics of the proposed converter are listed as follows: (1) Lowering the input-current ripple and reducing the conduction losses results in an increased lifetime of the renewable energy sources. (2) The converter easily obtains a high step-up gain. (3) By recycling the leakage energy, the voltage stresses of the clamp diodes are alleviated and the circuit efficiency is improved. (4) The voltage stresses on the semiconductor components are substantially lower than the output voltage.
This paper is organized as follows. Section II describes and analyzes the proposed high-step-up interleaved converter with a voltage multiplier. Section III analyzes the voltage gain, voltage stresses and conduction losses in the presented converter. Section IV presents experimental results of a prototype circuit for supplying a 1kW rated load. Finally, some conclusions are provided in Section V.
II. DESCRIPTION AND ANALYSIS OF THE PROPOSED HIGH-STEP-UP INTERLEAVED CONVERTER WITH A VOLTAGE MULTIPLIER
A circuit diagram of the proposed interleaved high-step-up converter is shown in Fig. 2. As illustrated, it contains a built-in transformer and a voltage-multiplier circuit. In addition, L1 and L2 are the energy storage inductors; S1 and S2 are the power switches; C1 and C2 are the clamp capacitors; Co1, Co2 and Co3 are the output capacitors; D1 and D2 are the clamp diodes; and D3, D4, D5 and D6 are the rectified diodes. The built-in transformer consists of a primary winding Np, a secondary winding Ns, and a leakage inductor Lk. The turns ratio n is the ratio of the secondary winding Ns and the primary winding Np. Using inductors on the input terminal of the interleaved converter can achieve a low level of input-current ripple. The voltage-multiplier circuit, which includes diodes (D1 and D2) and capacitors (C1 and C2), raises the voltage gain of the converter, clamps the voltages and alleviates the spikes across the power switches. Furthermore, a high step-up and a reduction of the losses across the power switches are attained by utilizing the built-in transformer, which includes a primary winding Np connected with power switches S1 and S2, and a secondary winding Ns connected with capacitors Co1 and Co2 and diodes D5 and D6.
Fig. 2.Circuit diagram of the proposed high-step-up interleaved boost converter.
The gate-driving signals of the two power switches are interleaved with a 180-degree phase shift, and the principal waveform of the proposed converter operating in the continuous-conduction mode (CCM) is depicted in Fig. 3. Fig. 4 shows the corresponding operational modes of the equivalent circuit. There are 10 main operational modes in one switching period. Due to the symmetrical nature of the interleaved topology, operating modes 1 to 5 are similar to modes 6 to 10. In order to simplify the analysis of the proposed converter’s operating principle, only modes 1 to 5 are analyzed and discussed. A detailed analysis of each operational mode in the proposed converter is shown in the following.
Fig. 3.Principal waveform of the proposed interleaved boost converter in CCM.
Fig. 4.The operating modes of the proposed interleaved boost converter. (a) Mode 1. (b) Mode 2. (c) Mode 3. (d) Mode 4. (e) Mode 5. (f) Mode 6. (g) Mode 7. (h) Mode 8. (i) Mode 9. (j) Mode 10.
Mode 1 [t0, t1]:
At t=t0, both power switches (S1 and S2) turn on. All of the diodes (D1, D2, D3, D4, D5 and D6) are reverse-biased. The path of the current flow is shown in Fig. 4(a). The inductors (L1 and L2) are charged by the input voltage Vin, and the currents increase linearly though the inductors (L1 and L2). The inductor currents (iL1 and iL2) are given by:
In addition, the capacitors Co1, Co2 and Co3 provide energy to the output load Ro.
Mode 2 [t1, t2]:
At t=t1, the power switch S2 turns off, and its parasitic capacitor is charged by the inductor current iL2. The path of the current flow is shown in Fig. 4(b). The voltage of the parasitic capacitor is given by:
The capacitors Co1, Co2 and Co3 continue providing energy to the output load Ro.
Mode 3 [t2, t3]:
At t=t2, the power switch S2 remains off. The voltages of the clamp diode D2 and the rectified diodes (D4 and D5) decrease. Then D2, D4 and D5 begin to turn on at t=t2. The path of the current flow is shown in Fig. 4(c). The input voltage Vin and inductor L2 provide energy to the primary winding Np of the built-in transformer, and to the clamp capacitor C1.
The drain-source voltage of the power switch S2 is clamped by the capacitor C1. In addition, the input voltage Vin, the inductor L2 and the capacitor C2 provide energy to the capacitor Co3 through the diode D4. The energy on the primary winding Np is transferred to the capacitor Co1 and the load Ro through the built-in transformer. The currents through L2, Lk and S1 are given by:
Mode 4 [t3, t4]:
At t=t3, the power switch S2 is still off. The diode currents (iD2 and iD4) decrease to zero, and the clamp capacitor voltage VC1 is equal to the drain-source voltage of the power switch S2. The path of the current flow is shown in Fig. 4(d). The input voltage Vin and the inductor L2 still transfer energy to the output capacitor Co1 and the load Ro through the built-in transformer. The currents through L2, Lk and S1 are respectively given by:
Mode 5 [t4, t5]:
At t=t4, the power switch S2 turns on. The rectified diode D5 remains forward-biased because the leakage inductor current iLk still exists. Because a major portion of the inductor current iL2 still flows into the power switch S1 through the leakage inductor Lk of the primary winding, the switch loss across the power switch S2 is reduced. The product of VDS and iDS can be decreased. Thus, the conversion efficiency is improved. The path of the current flow is shown in Fig. 4(e). The inductor current through iL2 is given by:
This mode ends when the leakage inductor current iLk decreases to zero at t=t5, and rectified diode D5 begins to be reverse-biased.
III. ANALYSIS OF THE VOLTAGE GAIN, VOLTAGE STRESSES, AND CONDUCTION LOSSES
To simplify the analysis of the presented converter operating in the CCM, the transient characteristics of circuits are disregarded, and small-ripple approximation is used for calculation. Thus, all of the currents passing through the components are approximately represented by their DC components. In addition, some formulated assumptions are shown in the following.
1) All of the components in the proposed interleaved boost converter possess ideal characteristics.
2) The coupling coefficient of the built-in transformer is unity. Hence, there is no leakage inductor in either the primary or secondary side of the transformer.
3) The voltages on capacitors and currents through the inductors are considered to be constant due to infinitely large capacitances and inductances.
4) Due to a completely symmetrical interleaved structure and operation, symmetrical components with the same characteristic and effects are defined by identical symbols. For example, D1 and D2 are defined as Dc; D3 and D4 are defined as Dfp; and D5 and D6 are defined as Dfs.
A. Voltage Gain
All of the voltages on the capacitors can be derived by the voltage-second balance theorem. The voltage on the clamp capacitors (C1 and C2) can be expressed as:
The voltages on the output capacitors (Co1, Co2 and Co3) can be derived from:
The output voltage Vo is equal to the sum of the voltage on the output capacitors (Co1, Co2 and Co3). Hence, the output voltage Vo can be given by:
The ideal voltage gain of the proposed interleaved boost converter can be obtained as:
Equation (15) confirms that the proposed interleaved converter has a high step-up voltage conversion gain without adopting a large turns ratio or an extremely high duty cycle. When the duty cycle is 0.6, the conversion gain reaches 15 at a turns ratio n of 2. The curves of the voltage gain related to the duty cycle in the proposed converter, under different turns ratio levels for the built-in transformer, are shown in Fig. 5.
Fig. 5.The voltage gain versus duty cycle in the proposed converter under different levels of turns ratio n.
B. Voltage Stresses
All of the voltage stresses on the semiconductor components can be derived by the known voltages of the capacitors. The voltage stresses of the power switches S1 and S2 are clamped, and are derived from:
The voltage stresses on the diodes (D1, D2, D3 and D4) are given by:
The relationship between the voltage stresses versus the output voltage Vo and the turns ratio n is illustrated in Fig. 6. All of the voltage stresses on the components are lower than the output voltage Vo. The voltage stress on the power switches (S1 and S2) and rectified diodes (D3 and D4) is less than 0.25, and the voltage stress on the champed diodes (D1 and D2) is lower than 0.5. Although the voltage stress on the rectified diodes (D5 and D6) is higher than the voltage stresses on the semiconductor components, they are still lower than the output voltage Vo. Thus, the proposed converter has low voltage stresses on its semiconductor components. Hence, low-voltage-rated power devices, such as MOSFETs with a low RDS(ON) and Schottky diodes with a shorter reverse-recovery time, can be employed for improving the circuit efficiency.
Fig. 6.The estimated voltage stresses on power switches and diodes.
C. Conduction Losses
An equivalent circuit for analyzing the conduction losses of the inductors and semiconductor components in the proposed converter is shown in Fig. 7, in which rL1 and rL1 are the copper resistances of the inductors, rDS1 and rDS2 are the on-resistances of the power switches, VD1, VD2, VD3, VD4, VD5 and VD6 are the forward voltages of the diodes, and rD1, rD2, rD3, rD4, rD5 and rD6 are the forward resistances of the diodes.
Fig. 7.Equivalent circuit for analyzing conduction losses in the proposed converter.
Due to the symmetrically interleaving structure and operation, symmetrical components with the same characteristic are defined by identical symbols in Equations (18) and (19). For example, rL1 and rL2 are defined as rL, rD1 and rD2 are defined as rDc, rDS1 and rDS2 are defined as rDS, VD1 and VD2 are defined as VDc, rD3 and rD4 are defined as rDf, VD3 and VD4 are defined as rDfp, and VD5 and VD6 are defined as rDfs. A small-ripple approximation is used to calculate the conduction losses. Thus, all of the currents passing through the components are approximately represented by their DC components. The magnetizing currents and capacitor voltages are assumed to be constant because of the infinite values of the magnetizing inductors and capacitors. Finally, by using the voltage-second balance and capacitor-charge balance theorems, the voltage conversion ratio, including the conduction losses of the power devices, can be derived from:
where:
In addition, the circuit efficiency is expressed by:
Fig. 8 shows the calculated voltage gain and circuit efficiency versus the duty cycle including the conduction losses of the power devices. Referring to Fig. 8, the calculated voltage gain is smaller than the ideal one shown in Fig. 5 due to the conduction loss. As illustrated, it is easy for the proposed converter to achieve high step-up voltage conversion. As a result, the converter is suitable for electric vehicle power management applications.
Fig. 8.Calculated voltage gain and circuit efficiency versus duty cycle including conduction losses of power devices.
IV. EXPERIMENTAL RESULTS
A 1kW prototype circuit of the proposed high-step-up converter has been built and tested. The electrical specifications for the presented converter are shown in Table I. The design considerations of the proposed converter include the component selection and inductor design, both of which are based on the analysis presented in the previous section. Because the proposed converter possesses a high step-up gain, the turns ratio can be set as 1.5 for the prototype circuit. This has the effect of reducing the cost, volume and conduction losses of the windings inside the built-in transformer.
TABLE IELECTRICAL SPECIFICATIONS
Fig. 9 shows experimental waveforms of the proposed converter measured at a full load of 1 kW. Fig. 9(a) shows the interleaved pulse-width modulation (PWM) signals VGS1 and VGS2, as well as the voltage stresses VDS1 and VDS2 on the power switches. Although spikes occur on S1 and S2, caused by the resonance of the parasitic inductors in the circuit and equivalent drain-to-source capacitor CDS of the MOSFETs, the leakage energy can still be recycled to the output load. In addition, the voltage stresses VDS1 and VDS2 are clamped at 80 V, which is much lower than the output voltage. Fig. 9(b) shows the measured ripple of the input current iin and the inductor currents iL1 and iL2. It also demonstrates a small ripple occurring on the input current. The current ripple is approximately one-twentieth of the input current at a full load. Fig. 9(c) shows the leakage-inductor current iLk and the currents through the power switches S1 and S2. Fig. 9(d) shows the measured voltage and current waveforms of the diodes D1 and D2. The voltage stresses on the diodes D1 and D2 are equal to VDS2 plus VC2 and VDS1 plus VC1, respectively. Fig. 9(e) shows the measured voltage and current on the diodes D3 and D4. In addition, the voltage stresses on the diodes D3 and D4 are equal to VCo3 minus VDS. Fig. 9(f) shows the measured voltage and current on the diodes D5 and D6. In addition, the voltage stresses on the diodes D5 and D6 are equal to VCo1 plus VNs and VCo1 plus VNs, where VNs is equal to VCo3 minus VC(clamp). The currents iD1, iD2, iD3 and iD4 decrease to zero with very slight reverse-recovery losses for the diodes. The ringing effects of the diode voltages, shown in Fig. 9(d), Fig. 9(e) and Fig. 9(f), are caused by the resonance due to the parasitic inductors in the circuit, the leakage inductors of the transformer in the primary and secondary sides, and the junction capacitors of the diodes. Fig. 10 shows iDS and VDS on the power switch S. The switch loss is lower than that of other hard-switching converters. Fig. 11 shows a photo of the presented converter, and some of the key components are marked. Fig. 12 shows the temperature distribution in the proposed converter at a full load of 1 kW by using a true infrared (IR) thermal imager (Agilent U5855A). The measured maximum and minimum temperatures are 59 ℃ and 27.1 ℃, respectively.
Fig. 9.The experimental waveforms for the proposed converter measured at a full load of 1 kW: (a) VGS1, VGS2, VDS1 and VDS2, (b) iin, iL1, and iL2, (c) iLk, iDS1 and iDS2, (d) VD1, VD2, iD1 and iD2, (e) VD3, VD4, iD3 and iD4, and (f) VD5, VD6, iD5 and iD6.
Fig. 10.The current iDS and voltage VDS on the power switch S.
Fig. 11.Photo of the presented converter.
Fig. 12.Temperature distribution in the proposed converter.
Fig. 13 presents the measured data of the proposed converter under the full-load condition (1 kW), obtained using a power analyzer (HIOKI 3390). The efficiency of the proposed converter measured per 100 W is illustrated in Fig. 14. In addition, the measured highest efficiency is 96.3% at 600 W, and the measured efficiency is 95.2% at a full load of 1 kW. Fig. 8 shows the calculated voltage gain and circuit efficiency under the 1kW load condition (the circuit parameters are: rL=30mΩ, VDb=VDfp=VDfs=0.7V, rds=20mΩ, rDc=rDfp= rDfs=20mΩ and Ro =144Ω). At a duty cycle D of 0.68, the measured voltage gain shown in Fig. 13 is approximately 15.8 (380.26V/24.069V) which is slightly larger than the calculated one 14.46. The measured efficiency under the full-load condition shown in Fig. 14 is 95.2%, which is slightly smaller than the calculated one (95.43%). The measured waveforms when the converter starts and a load step-up/down from 20% to 80% of the rated load are shown in Fig. 15 and Fig. 16, respectively.
Fig. 13.The measured data of the proposed converter under a full-load condition.
Fig. 14.The efficiency curves of the proposed high-step-up converter.
Fig. 15.The measured waveform when the proposed converter starts.
Fig. 16.The measured waveform when the load step-up/down from 20% to 80% rated load.
In addition, Table II shows some comparisons (including the voltage gain, component counts, switching losses, transformer type, voltage multiplier type, input current ripple, converter specifications, maximum efficiency and full-load efficiency) between the existing high step-up converters (including Ref. [23], [24], [25] and [26]) and the proposed converter. As shown in table II, the input current ripples in the proposed high step-up converter and those in [24] are smaller than those in [23], [25], and [26]. In addition, the full-load efficiencies in the proposed high step-up converter and in [25] are larger than those in [23], [24], and [26].
TABLE IICOMPARISON BETWEEN THE EXISTING HIGH STEP-UP CONVERTERS ([23], [24], [25] AND [26]) AND THE PROPOSED ONE
V. CONCLUSION
This paper proposed a highly efficient, high-step-up interleaved boost converter with a built-in transformer for electric vehicle power management applications. Analysis of the operational modes, voltage gain and stresses are included, and a 1kW prototype converter has been developed and tested. The presented interleaved boost converter reduces the input-current ripple, recycles the leakage energy through the lossless passive-clamp circuit, and lowers the voltage spikes across the power switches. Furthermore, the measured full-load efficiency is 95.2% at a rated output power of 1 kW, and the highest efficiency is 96.3% at an output power of 600 W. Experimental results have demonstrated the functionality of the proposed converter and shown that it has advantages in terms of high a step-up voltage gain and a high efficiency.
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