I. INTRODUCTION
Cascaded H-bridge multilevel (CHBML) inverters are widely used for motor drives and photovoltaic power conversion, because of advantages such as high-voltage output, improved electromagnetic compatibility, extreme modularity and a reduced number of components for synthesizing the same number of voltage levels [1]-[8]. The phase-shifted carrier (PSC) PWM is a commonly used modulation technique for CHBML inverters because it is easy to use and convenient for controlling the output power of individual H-bridge cells [9]-[12]. Unfortunately, the low frequency sideband harmonics elimination of the conventional PSCPWM only operates under the condition of equal cell dc voltages.
CHBML inverters need a large number of isolated dc voltage sources. This reduces the reliability of CHBML inverters, so the ability to ride through cell dc source faults is required [13]-[18]. Some cell dc source faults lead to a drop in the dc voltage. Therefore, the cell dc voltages are unequal. Some differences in the cell dc source parameters lead to unequal cell dc voltages too. Therefore, the capability of operating under the condition of unequal cell dc voltages is necessary for improving the reliability. However, the conventional PSCPWM cannot cancel low frequency sideband harmonics under the condition of unequal cell dc voltages. As a result, the output voltage waveform quality is reduced. On the other hand, high power CHBML inverters usually operate with a low carrier frequency to improve efficiency. In most applications, such as induction motor drives, reductions of the carrier frequency increase the current ripples, which are produced by the sideband harmonics around the carrier and double carrier frequency. Therefore, designing a PSCPWM that can cancel low frequency sideband harmonics under the condition of unequal dc voltages will improve the performance of CHBML inverters.
Recently, many researchers have been paying attention to CHBML inverters with unequal cell dc voltages and have proposed many modulation methods [19]-[26]. Some researchers are interested in selective harmonic elimination (SHE) PWM under the condition of unequal dc voltages [19], [20].This modulation method regulates the switching angles according to the different cell dc voltages to eliminate selective harmonics. In [21] and [22], selective harmonic mitigation (SHM) PWM techniques were developed for CHBML inverters with unequal dc voltages. However, the complexity of calculating the switching angles increases greatly when the number of voltage levels rises. As a result, the use of SHEPWM and SHMPWM is limited. In [24], a fast space vector modulation (SVM) technique for inverters with non-constant dc sources is presented. Considering the large number of space vectors, SVM is difficult to apply to multilevel inverters when the number of voltage levels is great. A commonly used modulation technique for CHBML inverters is the PSCPWM because of the modularity of this topology. Unfortunately, the PSCPWM technique of CHBML inverters with unequal dc voltages has not yet been published. This paper proposes a new PSCPWM, in which the carrier phases are calculated and regulated according to different dc voltages, to eliminate low frequency sideband harmonics.
The calculation of the carrier phases needs to solve nonlinear transcendental equations for the sideband harmonics elimination. Many methods have been presented to solve nonlinear transcendental equations. A systematic approach involves converting the transcendental equations into an equivalent set of polynomial equations [27]. Then they can be solved by use of the mathematical theory of resultants. However, considering the large degrees of the equivalent polynomial equations describing the problem of the proposed PSCPWM, this is not an effective approach. Many heuristic algorithms, such as particle swarm optimization (PSO), have been employed for solving transcendental equations [28,29]. Furthermore, some heuristic algorithms have been applied to the modulation methods for multilevel inverters. In [28], a method based on PSO is used to solve the transcendental equation of SHEPWM. Until now, a method to solve the problem of PSCPWM under the condition of unequal dc voltages has not been found in the literature. This paper presents an approach based on the artificial bee colony algorithm to calculate the cell carrier phases.
This paper is organized as follow. Section II introduces the principle of sideband harmonics elimination. Then it determines the reason why the conventional PSCPWM cannot cancel low frequency sideband harmonics under the condition of unequal dc voltages. Section III proposes a PSCPWM that can eliminate the sideband harmonics under the condition of unequal dc voltages. Section IV presents an approach, based on the artificial bee colony (ABC) algorithm, to calculate the carrier phases. Section V offers simulation and experimental results. Section VI provides a conclusion to this paper and discusses a potential research area.
II. THE TOPOLOGY OF CHBML INVERTERS AND THE LOW FREQUENCY SIDEBAND HARMONICS PROBLEM
All of the single-phase legs of three-phase CHBML inverters include several cascaded H-bridge cells consisting of a single-phase full-bridge (H-bridge) dc-to-ac converter and an isolated dc source. The topology of the single-phase leg of CHBML inverters is shown in Fig. 1.
Fig. 1.Topology of a single-phase leg of CHBML inverters.
In this paper, asymmetrical regular sampled PWM is adopted for the H-bridge cell. The inverter output voltage is analyzed by use of the double Fourier integral analysis [30],[31]. The output phase voltage can be expressed as:
In Equ. (1), ωs is the frequency of the carrier waveform; ωm is the modulating frequency; m is the amplitude modulation index; N represents the number of cascaded cells; Udch and θpsh are the dc voltage and the carrier phase of cell h, respectively; J1(mπ/2), Jb[bmπ/(2kf)] and Jb(dmπ/2) are all Bessel functions of the first kind; “a” and “b” are both integers; and “aωst+bωmt” denotes the frequency of the “b” order sideband harmonics around the “a” times carrier frequency. The ωs-to-ωm ratio kf and the variable “d” are defined as:
It can be observed that the cell output voltage shown in Equ. (1) can be divided into three parts: 1) the first term in (1) denotes the fundamental wave; 2) the second term defines the baseband harmonics; 3) the third term defines the sideband harmonics around the carrier frequency. Since this paper does not include the elimination of baseband harmonics, the expression of the sideband harmonics is separated from Equ. (1) and converted into a summation of the phasors, as shown in Equ. (4).
If the dc voltages are equal, they can be expressed as:
The conventional PSCPWM can completely eliminate the low frequency sideband harmonics only by setting the carrier phases θpsh=π(h-1)/N. The principle of the sideband harmonic cancellation can be expressed as:
Under the condition of unequal cell dc voltages, the low frequency sideband harmonics around 2fs, 4fs, … , 2(N-1)fs (fs=ωs/2π) cannot be removed by the conventional PSCPWM, because the summation of the low frequency sideband harmonics of the cascaded H-bridge cells are not zero, as shown in Equ. (8). As a result, the output power quality is significantly reduced.
III. THE PROPOSED PSCPWM
As can be seen from the analysis in Section II, the low frequency sideband harmonics cannot be cancelled by means of the conventional PSCPWM when the dc voltages are not equal. It can be found from Equ. (4) that the sideband harmonics around afs can be eliminated by regulating the carrier phases (θpsh) according to the different dc voltages. This principle can be expressed as:
The low frequency sideband harmonics are more difficult to filter and they usually produce greater current ripples on the load. Therefore, eliminating the low frequency sideband harmonics is a priority. Since one of the cell carrier phases is usually set to zero, only N-1 carrier phases can be regulated. On the other hand, the output voltage sideband harmonics of the H-bridge cell handled by the asymmetrical regular sampled PWM only exist around even times the carrier frequency harmonic. As a result, the low frequency sideband harmonics around 2fs, 4fs, … , kfs can be cancelled only by regulating the N-1 carrier phases. This principle is expressed as:
In Equ. (10), k is an even number. If N is an even number, k=N-2. If N is an odd number, k=N-1. The exact carrier phases for the low frequency sideband harmonics elimination are defined as the solution of Equ. (10).
IV. APPROACH BASED ON THE ARTIFICIAL BEE COLONY ALGORITHM
Karaboga proposed the artificial bee colony (ABC) algorithm in 2005 [32]. This heuristic method is developed based on imitating the foraging behavior of a bee swarm. In ABC algorithms, a colony of artificial bees includes employed bees, onlooker bees and scout bees. In general, the number of employed bees and onlooker bees are both Nb, which is equal to the number of food sources. Employed bees search for available food sources and gather necessary information, which will be passed on to the onlooker bees. The onlooker bees select good food sources from the found food sources and further investigate them. When the quality of a food source is not improved through a predetermined number of iterations, the food source is abandoned and the employed bee becomes a scout bee that searches a new food source in the entire available space. Each position of food sources denotes a possible solution to the optimization problem.
When the ABC algorithm is applied to calculating carrier phases, only N-1 carrier phases need be calculated because the first cell carrier phase θps1 is usually set to zero. Each food source is an N-1 dimension vector. Food source i can be expressed as θi=[θps2_i, θps3_i,…, θpsN_i], and the hth element is the carrier phase of cascaded H-bridge cell h. New food source i is also an N-1 dimension vector, and it can be expressed as Vi=[Vps2_i, Vps3_i,…, VpsN_i].
Since Equ. (10) refers to a multi-goal optimization, the direct use of the ABC algorithm to solve it is difficult. Therefore, (10) need to be reduced to a single equation. Since the magnitude of the high-order (|b|≥7) sideband harmonics around afs is usually negligible, (10) is reduced to Equ. (11), which denotes the normalized value of the weighted average of the low-order (b= ± 1,3,5) low frequency sideband harmonics magnitude.
The objective function of the ABC algorithm can be obtained from Equ. (11), and it can be expressed as:
It can be observed for Equ. (12) that the value of the objective function cannot be less than zero. On the other hand, the smaller the objective function value is, the better the solution quality is. Then the fitness value of the food source i can be expressed as:
The major procedure for calculating the carrier phases is as follows:
Take for example a CHBML inverter in which each phase leg is composed of five cascaded H-bridge cells. The dc voltages of the 1st to 4th cells are 0.996, 1.001, 1.002 and 0.7 times the nominal dc voltage, respectively. In addition, the dc voltage of the fifth cell changes between 0.4 and 1.0 times the nominal dc voltage. As mentioned previously, the first cell carrier phase θps1 is zero. The four calculated carrier phases θps2, θps3, θps4 and θps5 are shown in Fig. 2(a), and the corresponding objective function values are shown in Fig. 2(b). The convergence speed for calculating the four cell carrier phases is show in Fig. 3, when the dc voltage of the fifth cell is 0.4 times the nominal dc voltage.
Fig. 2.Four calculated carrier phases and the corresponding objective function values.
Fig. 3.Convergence speed of the calculation.
The other example is an inverter in which each phase leg includes nine cascaded H-bridge cells. The dc voltages of the 1st to 8th cells are 0.996, 1.0, 1.002, 1.001, 0.999, 0.997, 1.003 and 0.7 times the nominal dc voltage, respectively. In addition, the dc voltage of the ninth cell changes between 0.4 and 1.0 times the nominal dc voltage. The eight calculated carrier phases θps2, θps3, θps4, θps5, θps6, θps7, θps8, and θps9 are shown in Fig. 4(a), and the corresponding objective function values are shown in Fig. 4(b). The convergence speed of calculating the eight cell carrier phases is show in Fig. 5, when the dc voltage of the ninth cell is 0.4 times the nominal dc voltage.
Fig. 4.Eight calculated carrier phases and the corresponding objective function values.
Fig. 5.Convergence speed of the calculation.
Fig. 2 and Fig. 4 show that the carrier phases can be calculated by the use of the presented approach based on the ABC algorithm according to different dc voltages. They also show that the weighted average of the magnitude of the low-order low frequency sideband harmonics can be reduced to an acceptable level. Fig. 3 and Fig. 5 show that the objective function values can be reduced to an acceptable level (lower than 0.01) within several tens of iterations. Therefore, when the calculation is applied in a digital controller such as a DSP, the calculation of the carrier phases can be achieved within several tens of mini-seconds.
V. SIMULATION AND EXPERIMENT
A mathematical model of the CHBML inverter was established by means of MATLAB/SIMULINK to verify the proposed PSCPWM method. Each single-phase leg of the three-phase CHBML inverter includes five cascaded H-bridge cells. The fundamental wave frequency is 50Hz, and the cell carrier wave frequency is 300Hz. The amplitude modulation index of each cell is 0.99. The phase voltage output is connected to a load that consists of a 1.383Ω resister and a 0.89mH inductance in series. The iteration of calculating the carrier phases is completed 3000 times per second. The cell dc voltages, the carrier phases of the conventional PSCPWM and the carrier phases calculated by use of the presented approach based on the ABC algorithm are shown in Table I.
TABLE IDC VOLTAGES AND CARRIER PHASES OF THE CELLS
Fig. 6 shows the phase voltage waveform and the corresponding harmonic components obtained from the conventional PSCPWM when the dc voltage of the fifth cell is 42V. The phase voltage waveform and the corresponding harmonic components of the proposed PSCPWM are shown in Fig. 7. Fig. 8 shows the current waveform obtained with the conventional PSCPWM, and when the proposed PSCPWM is applied after 0.05 second (t1). Fig. 9 shows the phase voltage waveform and the corresponding harmonic components obtained from the conventional PSCPWM when the dc voltage of the fifth cell is 51V. The phase voltage waveform and the harmonic components of the proposed PSCPWM are shown in Fig. 10. Fig. 11 shows the current waveform of the load with the conventional PSCPWM, and when the proposed PSCPWM is applied after 0.05 second (t1).
Fig. 6.Output voltage waveform and harmonics of the conventional PSCPWM when the fifth cell dc voltage is 42V.
Fig. 7.Output voltage waveform and harmonics of the proposed PSCPWM when the fifth cell dc voltage is 42V.
Fig. 8.Current waveform when the fifth cell dc voltage is 42V, the conventional PSCPWM is applied at first and the proposed PSCPWM is applied after 0.05 second.
Fig. 9.Output voltage waveform and harmonics of the conventional PSCPWM when the fifth cell dc voltage is 51V.
Fig. 10.Output voltage waveform and harmonics of the proposed PSCPWM when the fifth cell dc voltage is 51V.
Fig. 11.Current waveform when the fifth cell dc voltage is 51V, the conventional PSCPWM is applied at first and the proposed PSCPWM is applied after 0.05 second.
As seen from the harmonic components in Fig. 6 and Fig. 9, the conventional PSCPWM cannot eliminate the sideband harmonics around 600Hz (2fs) and 1200Hz (4fs). Fig. 7 and Fig. 10 show that the sideband harmonics around 600Hz and 1200Hz can be eliminated when the proposed PSCPWM is utilized. It can be observed from Fig. 8 and Fig. 11 that the current waveform contains some distortions when the conventional PSCPWM is applied (from 0 second to 0.05 second). The distortions of the current are reduced within 33 mini-second (from t1 to t2) when the proposed PSCPWM is applied after t1 (0.05 second). This means that the calculation and regulation of the cell carrier phases can be achieved quickly.
In order to further verify the proposed PSCPWM, more simulations are carried out under the condition that the fifth cell dc voltage changed between 62 V and 90 V. Table II contains four combinations of unequal dc voltages and the carrier phases of the proposed PSCPWM. The carrier phases of the conventional PSCPWM are θpsh = (h – 1)π/5. Table III shows the corresponding magnitude of the significant sideband harmonics around 600 Hz (2fs) and 1200 Hz (4fs).
TABLE IIDIFFERENT COMBINATIONS OF UNEQUAL CELL DC VOLTAGES AND THE CARRIER PHASES
TABLE IIISIDEBAND HARMONICS AROUND 600 HZ AND 1200 HZ OBTAINED FROM THE SIMULATION
According to Table III, the conventional PSCPWM cannot eliminate low frequency sideband harmonics when the cell dc voltages are not equal. All of the significant sideband harmonics around 600 Hz and 1200 Hz can be almost completely eliminated when the proposed PSCPWM is applied.
Experiments have been carried out on a CHBML inverter to verify the proposed PSCPWM technique. The topology and parameters of the inverter are identical to those of the simulation model. The inverter is shown in Fig. 12. Its control system consists of a main controller, cell controllers and communication devices. Each controller is composed of a low-cost DSP (TMS320F28335) and its auxiliary circuit. The main controller generates voltage (current) command values and calculates the cell carrier phases. It also handles the functions of monitoring, observation, protection, human-machine interface and the other auxiliary functions of a system. The cell controller that is installed in the H-bridge cell regulates the cell carrier phase and generates PWM signals. In addition, it can perform the functions of monitoring and protection.
Fig. 12.CHBML inverter.
Fig. 13 shows the phase voltage waveform obtained with a digital oscilloscope and the harmonic components obtained with the fast Fourier transformation function of the digital oscilloscope when the conventional PSCPWM is applied. Fig. 14 shows the phase voltage waveform and the harmonic components when the proposed PSCPWM is used. Fig. 13 and 14 are both obtained under these conditions: 1) the first to fourth cell dc voltages are 99V, 101V, 102V and 71V, respectively; 2) the fifth cell dc voltage is 42V. Under the condition that the fifth cell dc voltage changes to 51V, Fig. 15 and Fig. 16 show the phase voltage waveform and the harmonic components of the conventional PSCPWM and the proposed PSCPWM, respectively.
Fig. 13.Output voltage waveform and harmonics of the conventional PSCPWM when the fifth cell dc voltage is 42V.
Fig. 14.Output voltage waveform and harmonics of the proposed PSCPWM when the fifth cell dc voltage is 42V.
Fig. 15.Output voltage waveform and harmonics of the conventional PSCPWM when the fifth cell dc voltage is 51V.
Fig. 16.Output voltage waveform and harmonics of the proposed PSCPWM when the fifth cell dc voltage is 51V.
Other experiments have been carried out on the prototype inverter to further verify the proposed PSCPWM, when the fifth cell dc voltage changed between 62V and 90V. The cell dc voltages and carrier phases of the proposed PSCPWM are listed in Table II. Table IV contains the corresponding magnitudes of the significant sideband harmonics around 600 Hz (2fs) and 1200 Hz (4fs).
TABLE IVSIDEBAND HARMONICS AROUND 600 HZ AND 1200 HZ OBTAINED FROM THE PROTOTYPE EXPERIMENTS
It can be found from Fig. 13, Fig. 15 and Table IV that the conventional PSCPWM cannot cancel the sideband harmonics around 600Hz and 1200Hz. Fig. 14, Fig. 16 and Table IV show that the proposed PSCPWM can almost completely eliminate the low frequency sideband harmonics when the cell dc voltages are unequal and changing. Therefore, the load current distortions caused by the harmonics are reduced, and the load operates more smoothly. The prototype experimental results are slightly different than the simulation results because of the inevitable measuring error of the dc voltages and the synchronization error of the cell carrier phases.
VI. CONCLUSION AND DISCUSSION
A large number of isolated dc voltage source reduces the reliability of CHBML inverters. Therefore, the capability of riding through cell dc voltage source faults is required. Some faults of cell dc voltage sources result in unequal dc voltages. The conventional PSCPWM is unable to cancel low frequency sideband harmonics under the condition of unequal cell dc voltages, and the output power quality of CHBML inverters is reduced. Based on the principle of sideband harmonics elimination, this paper proposes a PSCPWM to remove low frequency sideband harmonics by calculating and regulating the carrier phases according to different cell dc voltages. Then an approach based on the ABC algorithm is proposed to calculate the carrier phases. The proposed PSCPWM technique preserves the merits of the conventional PSCPWM and reduces the negative consequence of unequal dc voltages, thereby enhancing the fault tolerant capability of CHBML inverters. This method can also be applied to other types of multilevel inverters, such as modular multilevel converters (MMC).
As seen from the analysis in Section II, the cell amplitude modulation indexes and the phases of the cell modulation waveform also effect the elimination of low frequency sideband harmonics. At present, many researchers are interested in balancing cell dc voltages, when the cell input voltages or loads are not equal [33-36]. Usually, a cell dc voltage balancing controller results in unequal cell amplitude modulation indexes or (and) different cell modulation waveform phases [36]. When cell dc voltage balancing is applied, low frequency sideband harmonic elimination may be an interesting research area.
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