Design and Implementation of an FPGA-based Real-time Simulator for a Dual Three-Phase Induction Motor Drive

Abstract

This paper presents a digital hardware implementation of a real-time simulator for a multiphase drive using a field-programmable gate array (FPGA) device. The simulator was developed with a modular and hierarchical design using very high-speed integrated circuit hardware description language (VHDL). Hence, this simulator is flexible and portable. A state-space representation model suitable for FPGA implementations was proposed for a dual three-phase induction machine (DTPIM). The simulator also models a two-level 12-pulse insulated-gate bipolar transistor (IGBT)-based voltage-source converter (VSC), a pulse-width modulation scheme, and a measurement system. Real-time simulation outputs (stator currents and rotor speed) were validated under steady-state and transient conditions using as reference an experimental test bench based on a DTPIM with 15 kW-rated power. The accuracy of the proposed digital hardware implementation was evaluated according to the simulation and experimental results. Finally, statistical performance parameters were provided to analyze the efficiency of the proposed DTPIM hardware implementation method.

I. INTRODUCTION

Recently, digital hardware implementations of real-time simulators have been widely performed in several research fields. In particular, the design and development of power electronic devices and electrical drives have greatly benefited from the advances associated with real-time simulation techniques [1]–[4]. In electrical drive applications, the controller stage is typically subjected to several cycles of testing and redesigns before prototyping. The testing and redesign processes are conducted using an expensive facility equipped with power converters, electrical motors, sensors, switchgears, and other test equipment. The highly active research area in this field is justified in terms of implementation costs. Real-time simulators can accurately and efficiently model electrical drives and provide an alternate means for testing controller performance in hardware-in-the-loop (HIL) configurations [5]–[8]. This approach substantially reduces costs, human resources, power consumption, and the required physical space while providing immunity to damages in cases of controller malfunction [9]–[11]. Real-time simulators have been proven to be viable for several electrical motors and drives, such as permanent magnet synchronous motors [12], brushless DC motors [13], and three-phase induction motors [14].

In the present work, a novel implementation of a real-time simulator of a dual three-phase induction machine (DTPIM) is developed by employing a discrete version of the mathematical model using a state-space representation. The most suitable option in terms of cost is to implement the simulator using a standard PC. However, this approach does not allow real-time simulations, which are required to test the controller in the HIL configuration. Using a field-programmable gate array (FPGA) evaluation board for this purpose is advantageous because most of the required I/O interfaces for the HIL configuration can be integrated directly and are controlled by the FPGA. Furthermore, real-time requirements can be easily fulfilled by exploiting the parallelism capabilities of the FPGA while development cost can be greatly decreased by programming the FPGA in high-level development languages, as well as by using resources such as intellectual property (IP) blocks. Finally, FPGAs facilitate the extension of the implementation for future releases of the simulator. Given all these reasons, FPGAs are regarded as adequate candidates for implementing the real-time part of the simulator, whereas relaying in a standard PC is suitable for storage and non-real-time operations. In this study, we select a Xilinx SP605 evaluation board, which includes a Spartan-6 FPGA, to facilitate the implementation of I/O interfaces.

Real-time simulation results are validated experimentally using a 15 kW DTPIM test bench. Therefore, this work constitutes a starting point for testing different types of controllers applied to the DTPIM in an HIL configuration. The remainder of this paper is organized as follows. Section II introduces the mathematical model of the DTPIM on the basis of the vector space decomposition (VSD) approach. Section III presents the details of the hardware and software implementation of the real-time simulator. Section IV provides the details and characteristics of the experimental test bench. In addition, this section includes a comparison of the results obtained by the real-time simulator and those obtained through a MATLAB/Simulink model and via experimental tests that quantify the statistical performance parameters. Finally, Section V summarizes the concluding remarks.

 

II. THE DPTIM MATHEMATICAL MODEL

Multiphase machines are well recognized as an attractive alternative to conventional three-phase machines in several industrial applications (more-electric aircraft, electric and hybrid vehicles, ship propulsion, and wind power systems), which require high overall system reliability and reduction in total power (current) per phase [15]–[17]. One of the most widely discussed topologies is the asymmetrical DTPIM with two sets of three-phase stator windings that are spatially shifted by 30 electrical degrees and isolated neutral points (Fig. 1(a)). The DTPIM is a continuous system, which can be described by a set of differential equations. The model of the system can be simplified by using VSD theory [18]. This theory enables the transformation of the original six-dimensional space of a machine model into three two-dimensional orthogonal subspaces in stationary reference frames (α–β), (x–y), and (z1–z2) by means of a 6×6 transformation matrix and using an amplitude invariant criterion. This matrix, T, is defined as

Fig. 1.Winding configuration and feed topology of an asymmetrical dual three-phase induction machine.

According to the VSD approach, electromechanical energy conversion variables are mapped in the (α–β) subspace while the current components in the (x–y) subspace represent the supply harmonics of order 6n±1 (n = 1, 3, 5, …) and only generate losses. The voltage vectors in the (z1–z2) subspace are zero because of the isolated neutral point configuration [19]. Moreover, the DTPIM is supplied with a two-level 12-pulse insulated-gate bipolar transistor (IGBT)-based voltage-source converter (VSC) and a Dc-link (VDc), as shown in Fig. 1(b). The VSC exhibits a discrete nature with 26=64 different switching state vectors defined by six switching functions, which correspond to six inverter legs [Sa, Sd, Sb, Se, Sc, Sf], where Sa-f ∈ {0,1} . The different switching state vectors and VDc voltage define the phase voltages, which can in turn be mapped to the (α–β)–(x–y) space according to the VSD approach [20], [21]. To represent the stationary reference frame (α–β) in a rotating reference frame (d–q), a rotation transformation can be used. This transformation matrix, Tdq, is represented as

where θr is the rotor angular position referred to the stator, as shown in Fig. 1(a).

The dynamic behavior of the DTPIM can be modeled using a state-space representation as follows [22]:

where [u]4×1=[uαs, uβs, 0, 0]T is the input vector, [x]4×1=[iαs, iβs, iαr, iβr]T is the state vector, and [A]4×4 and [B]4×4 are the parameter matrices that characterize the dynamics of the electrical drive. The set of state variables described above is defined as

where Rs and Rr are the stator and rotor resistance, respectively; ωr is the rotor angular speed; and Ls, Lr, and Lm are the stator, rotor, and magnetizing inductances, respectively. Furthermore, the constants ci (i=1,2,3,4) are defined as:

The proposed mathematical model can be discretized using the Euler method. Thus, the prediction of the state vector for the sample (k+1) calculated at sample time (k), namely, , can be expressed as

where Tm is considered the sampling time and I is the identity matrix. Moreover, for a machine with P pairs of poles, the electromagnetic torque (Te) of the drive can be modeled by the following equation:

where ψαr and ψβr are the rotor fluxes in the (α–β) subspace.

The relationship between torque and rotor speed can be written as

where TL is the load torque, Ji is the machine inertia, and Bi is the viscous friction coefficient. Equs. (8) and (9) can be represented in discrete time with a procedure analogous to the one used for Equ. (7). Therefore, electromagnetic torque and speed evolutions can be represented as a function of the state variables by the following equations:

The functional block diagram of the discretized DTPIM model is shown in Fig. 2(a). Equs. (7), (10), and (11) are implemented by using basic arithmetic blocks, such as adders, multipliers, and registers, which are used to obtain the necessary time delays. The input variables are the voltages applied to the stator windings (ua, ub, uc, ud, ue, uf) and load torque. The output of the functional block diagram could be any of the following parameters obtained through a mathematical manipulation of inputs and/or state variables, which is the most common approach for control applications: electromagnetic torque, rotor angular speed, stator, and rotor currents in a stationary reference frame. The real-time simulator is developed and implemented using the Xilinx SP605 development board, which is shown in Fig. 2(b). This board features a Spartan-6 XC6SLX45T FPGA.

Fig. 2.Implementation characteristics of the real-time simulator.

 

III. REAL-TIME SIMULATOR IMPLEMENTATION

A simplified scheme of the real-time simulator is shown in Fig. 3, in which the data flow among blocks is represented by arrows. The digital system implements a custom-made processor featuring Harvard architecture with separate data and program memories, program counter, processing unit, input and output modules, and a clocking module. As shown in Fig. 3, the core of the implementation is the control unit. The control unit interconnects, manages, and coordinates the rest of the blocks by reading, decoding, and executing program instructions. Program instructions are stored in program memory and indexed by the program counter. The input module captures pulse-width modulation (PWM) signals through the digital pins of the evaluation board and converts them into floating-point values, which can be operated by the processing unit. The processing unit is capable of performing sums and products and is used to implement Equs. (7), (10), and (11). The operands employed by the processing unit are read from the data memory, which enables their simultaneous reading in a single clock cycle. Data memory can also store the results provided by the processing unit. The output module provides the PC with the values of the state vector, as well as the input voltages for each clock cycle. Finally, the clock module aims to generate all the clock signals required by the different blocks of the real-time simulator.

Fig. 3.Block diagram of the real-time simulator architecture.

The details of each block are as follows:

The developed program code implements Algorithm 1. This algorithm can be implemented by means of addition, multiplication, and branch instructions, as well as some instructions for storing and reading data from memories, transferring data to buffers of the output module, and acquiring data present in the digital input pins.

ALGORITHM IIMPLEMENTATION OF THE MATHEMATICAL MODEL

From a software point of view, the Xilinx ISE Design Suite environment is used during the design, test, and implementation phases. The integrated development environment (IDE) ISE constitutes the main development tool, whereas the ISE simulator (ISim) is for testing and debugging purposes. In addition, all functional blocks are developed by combining pieces of very high-speed integrated circuit hardware description language (VHDL) code and Xilinx IP blocks.

The real-time simulator architecture consists of multiple processes running at different rates. Fig. 4 represents the relationship among the different rates used. The evaluation board provides a main differential clock of 200 MHz, which feeds a phase-locked loop (PLL) to derive the clock signals of 100 and 50 MHz for the PWM generator and real-time simulator, respectively. In the PWM generator, a 50 Hz sine wave varies the duty cycle of a 10.8 kHz PWM carrier to obtain the VSC voltage for the simulation. Similarly, the hardware simulation of the DTPIM model is executed with a simulation step of 40.96 μs (24.4 kHz). Despite the fact that the simulation can run at frequencies as high as 100 kHz, the simulation step is selected to match the sampling rate of the measurement instruments.

Fig. 4.Real-time simulator timing resolution.

 

IV. EXPERIMENTAL RESULTS

A. Experimental Setup Overview

A commercial three-phase induction machine with three pairs of poles, 72 slots, and 15 kW-rated power is rewound to obtain an asymmetrical dual three-phase winding (with two isolated neutral points) with the same pairs of poles and rated power as the original three-phase machine. Conventional blocked rotor and no-load test procedures are applied to determine experimentally the electrical and mechanical parameters of the DTPIM. The obtained values are presented in Table I. Two three-phase Semikron SKS 35F B6U+E1CIF+B6CI21V VSC modules are used to generate six-phase stator voltages. The VSC modules are fed in parallel by a three-phase grid of 380 VRMS, and the internal rectifiers generate a DC voltage of 585 V. A hardware timer based on the LM555 device operating in monostable mode is implemented to control the internal pre-charge circuit of the SKS 35F converter modules.

TABLE I1Current per phase

The implementation of the control system is based on the digital signal processor (DSP) TMS320LF28335 manufactured by Texas Instruments and the Technosoft MSK28335 board, which comprises 12 PWM outputs. PWM outputs are configured to achieve a 10 kHz carrier frequency. Stator currents are measured using Hall effect sensors (LA55P from LEM). The analog-to-digital converters of the Technosoft board, which comprises 16 parallel channels, are used to capture the measured signals. On the other hand, the mechanical speed is measured by employing a Hengstler RI 58-O digital incremental encoder with a resolution of 10,000 pulses per revolution and the eQEP peripheral of the DSP. The digital inputs and outputs of the control board are galvanically isolated with the ISO7230CDW isolator manufactured by Texas Instruments to preserve system integrity. Fig. 5 shows the scheme of the experimental setup used to validate the real-time hardware simulator of the DTPIM. To quantify the performance of the real-time simulator, a PLL software implementation is employed in the estimation of the stator current angle (θr). The block diagram of the proposed PLL scheme is shown in Fig. 6.

Fig. 5.Start-up characteristics of stator current.

Fig. 6.Block diagram of a PLL with specialdesign of the compensator.

The output of the PLL scheme provides the current angle value that is employed to calculate the stator current in a rotating reference frame (id –iq) using the transformation matrix shown in Equ. (2). The statistical performance parameters (with stator current evolution in a rotating reference frame as a reference) across three different cases are evaluated and compared. The cases involve a real-time hardware simulator based on the FPGA device, DTPIM model based on a MATLAB/Simulink simulation environment, and a real DTPIM.

B. PLL Software Implementation

Fig. 6 shows that the dynamic performance of the proposed PLL is highly influenced by the compensator G(z). Considering that the reference signal is the stator current in d axis and given that the loop gain includes an integral term, θr must track the constant component of the reference signal with zero steady-state error. However, to ensure zero steady-state error, the loop gain must include at least two integrators. Therefore, G(z) must include at least one integral term, that is, one pole at z = 1. The other poles and zeros of G(z) are determined mainly by the closed-loop bandwidth requirements of the PLL and stability indices, such as phase margin and gain margin, according to the procedure described in [26]. Considering that G(z) is controllable, the transfer function can be expressed in the following controllable canonical form:

where the matrix [F]5×5 and the vectors [D]5×1 and [C]1×5 define the dynamics of the PLL compensator [G(z)], whose set of state variables (Fig. 7) is as follows:

Fig. 7.Block diagram representation of G(z) transfer function on controllable canonical form.

This state-space realization is in controllable canonical form because the resulting model is guaranteed to be controllable. As the control enters a chain of integrators, it can move every state (Fig. 7).

The proposed PLL architecture is implemented by using the TMS320LF28335 DSP with consideration of floating-point arithmetic and 10 kHz sampling frequency. The PLL algorithm is executed as an interrupt service routine (ISR), which is triggered by one of the general-purpose timer circuits available on the chip. The same timer also triggers the simultaneous acquisition of input signals with sampling interrupt. As the on-chip A/D converters achieve a rapid conversion rate (approximately 106 ns of conversion time), input data are made available at the beginning of the ISR with negligible time delay. Immediately after the A/D conversion, the current components in the stationary reference frame (α–β) are calculated at each sampling time from the measured phase stator currents (ibs,ics,ids,ifs) by using Equ. (1).

Fig. 8 shows the stator current angle evolution obtained experimentally by using the proposed PLL architecture when the DTPIM is fed with electrical frequency voltages (fe) of 40 Hz. In the figure, the angle evolves from 0 to 2π during a single period of the stator current wave. The result is also observed to be satisfactory even when the stator currents in the stationary reference frame are distorted because of electrical noise.

Fig. 8.Stator current angle evolution obtained experimentally by using the proposed PLL with a specially designed compensator.

C. DTPIM Real-Time Simulator Performance

The performance of the real-time simulator is analyzed and validated using the experimental setup and a DTPIM MATLAB/Simulink model, in which a fourth-order Runge–Kutta numerical integration method is applied to compute the evolution of the state variables step by step in the time domain. Table I shows the electrical and mechanical parameters of the asymmetrical DTPIM, which are considered during the implementation of the real-time simulator. The accuracy of the real-time simulator is evaluated under no-load conditions.

Fig. 9 shows the start-up characteristics of the stator current when a VSC supplied with 585 V of Dc-Link is considered and when a sinusoidal modulation index of 0.275 and a frequency of 50 Hz are applied. Fig. 9(a) shows the iβ current evolution of the DTPIM provided by the proposed real-time hardware simulator based on the FPGA. In this case, the VSC, PWM scheme, and AC motor are simulated within the FPGA.

Fig. 9.Start-up characteristics of stator current.

After the real-time simulation, the state variables are sent to the computer through a Gigabit–Ethernet link for analysis. The stator current evolution is compared with the id current obtained using the experimental setup to verify the agreement between the real-time simulation results and experimental results, especially with respect to the time constants associated with the DTPIM (start-up speed, steady-state current, etc.). The time constants converge to the values obtained experimentally under transient and steady-state conditions, in which quantifying a steady-state current of approximately 2 A is possible. Fig. 9(b) shows the results obtained using the MATLAB/Simulink model, and Fig. 9(c) shows the results obtained experimentally. These results are compared with the id current obtained experimentally. The start-up current evolution converges to a common value for the FPGA-based or MATLAB/Simulink-based simulations, as well as for the experimental setup, with a start-up transient of approximately 1.15 s. After 1.5 s, the reference frequency is changed from 40 Hz to 50 Hz while the modulation index is kept constant at 0.275. Fig. 10 shows the rotor speed evolution for the three cases previously analyzed. The results provided by the FPGA-based simulator and MATLAB/Simulink model under steady-state conditions converge to the values obtained experimentally using a motor with three pairs of poles and 50 Hz of nominal frequency (1,000 rpm).

Fig. 10.Transient rotor speed evolution.

Fig. 11 shows the power spectral density of the iβs stator current measured experimentally and depicted in Fig. 9(c). The switch mode operation effect of the converter caused by the PWM modulation technique is noticeable. Specifically, clusters of high-order harmonics appear in the frequency spectra of the converter currents at multiples of the switching frequency. Regardless of the control method employed, the harmonics generated by the fast-switching PWM converter introduce a significant amount of distortion in the range beginning at the switching frequency [27].

Fig. 11.Power spectral density of the iβs stator current.

Statistical performance parameters, such as covariance, standard deviation (SD), and mean squared error (MSE), are used to evaluate the accuracy of the results provided by the real-time simulator, taking as reference the results obtained through simulations and by means of experimental tests. The envelope of the fundamental frequency component of the stator currents in the stationary reference frame can be calculated using the Hilbert transform (HT) method. This envelope detection method involves creating analytic signals of the stator current using the HT method. An analytic signal is a complex signal, whose real part (iαs) is considered the original signal and the imaginary part (jiβs) is the HT of the original signal. A discrete-time analytic signal (ħ(k)) can be defined as follows:

The envelope of the signal can be determined by computing the modulus of the analytic signal from the following equation:

The above equation can be used to determine the envelope evolution of the stator current, which is used to evaluate the aforementioned statistical performance parameters. With this analysis, we can determine the degree of dispersion of the stator current envelope with respect to the value obtained experimentally through the PLL software implementation (shown in red color in Fig. 9).

The statistical relationship between the curves (iqs and stator current envelope) and the MSE are analyzed under steady-state conditions. Table II details the results of the three different DTPIM implementation methods considered in Fig. 9. Note that the obtained covariance results are positive. These results show a linear dependence between the iqs current obtained through the PLL implementation and the stator current envelope obtained by means of the HT method. The results tend to show similar behaviors across the three cases. Moreover, the low SD values shown in Table II indicate that the data points in steady-state conditions tend to be very close to the mean values of the iqs current. The MSE values are used for comparative purposes. Note that the obtained MSE results are similar and close to 1 A for the three cases. These results show the good behavior of the real-time hardware simulator.

TABLE IIPERFORMANCE ANALYSIS

Further analysis is conducted to examine the performance of the real-time simulator under different test conditions. For example, a change in the modulation index from 0.275 to 0.481 is considered at t = 1.5 seconds, along with a constant voltage frequency of 40 Hz. Fig. 12(a) shows the trajectory of current evolutions in two planes (α–β) considering at least four current periods in a steady-state operation, in which the effect of the change in the modulation index in the reference voltages can be observed. Fig. 12(b) shows the results obtained using the MATLAB/Simulink model, and Fig. 12(c) shows the experimental results. As in the previous case, the simulated current converges to the values equivalent to those obtained experimentally and exhibits a similar dynamic behavior. These results prove the good behavior of the real-time simulator.

Fig. 12.Real-time simulator iαsvs.iβs characteristics.

Finally, Fig. 13 shows the stator current evolution in the rotating reference frame (d–q) obtained with Eq. (2) using the angle values calculated by the PLL software implementation. The steady-state current values converge to the values shown in Fig. 12 before and after the change applied in the modulation index from 0.275 to 0.481, with the values being close to 2 and 4 A, respectively. These results show the good behavior of the proposed real-time simulator applied to the DTPIM.

Fig. 13.Stator current evolution in a rotating reference frame.

 

V. CONCLUSION

Multiphase induction motor drives have emerged in recent years for different applications, especially those that require high power and reliability. These applications are still evolving and thus require a constant evaluation of the new constraints associated with power electronics, magnetic saturation, and control systems. Major studies will require the use of flexible and scalable real-time simulators.

This paper introduced a DTPIM real-time simulator implemented by using an FPGA-based development board. First, the mathematical model of the multiphase machine was introduced. Second, the details of the implementation (hardware and software) were presented. To validate the results obtained by the FPGA-based simulator, an experimental test bench was designed. In addition, the obtained results were compared with those provided by a MATLAB/Simulink model under no-load conditions. An error close to zero was obtained for the results generated by the FPGA-based simulator and MATLAB/Simulink model. These results were consistent with the experimental results, thereby validating the behavior of the implemented real-time simulator in terms of accuracy. The obtained results constitute the starting point for the development of test systems, which involve multiphase (more than three phases) electrical motors in HIL configurations and thus entail minimal costs, human resources, power consumption, and physical space.