A Novel Fast Open-loop Phase Locking Scheme Based on Synchronous Reference Frame for Three-phase Non-ideal Power Grids

Abstract

Rapid and accurate phase synchronization is critical for the reliable control of grid-tied inverters. However, the commonly used software phase-locked loop methods do not always satisfy the need for high-speed and accurate phase synchronization under severe grid imbalance conditions. To address this problem, this study develops a novel open-loop phase locking scheme based on a synchronous reference frame. The proposed scheme is characterized by remarkable response speed, high accuracy, and easy implementation. It comprises three functional cascaded blocks: fast orthogonal signal generation block, fast fundamental-frequency positive sequence component construction block, and fast phase calculation block. The developed virtual orthogonal signal generation method in the first block, which is characterized by noise immunity and high accuracy, can effectively avoid approximation errors and noise amplification in a wide range of sampling frequencies. In the second block, which is the foundation for achieving fast phase synchronization within 3 ms, the fundamental-frequency positive sequence components of unsymmetrical grid voltages can be achieved with the developed orthogonal signal construction strategy and the symmetrical component method. The real-time grid phase can be consequently obtained in the third block, which is free from self-tuning closed-loop control and thus improves the dynamic performance of the proposed scheme. The proposed scheme is adaptive to severe unsymmetrical grid voltages with sudden changes in magnitude, phase, and/or frequency. Moreover, this scheme is able to eliminate phase errors induced by harmonics and random noise. The validity and utility of the proposed scheme are verified by the experimental results.

I. INTRODUCTION

Fast and accurate phase synchronization, also known as phase locking, is essential for high-performance inverter control under severely distorted and unbalanced grid conditions [1]-[6]. Dynamic behavior, steady-state performance, and adaptability to grid disturbance are key indicators for evaluating phase locking schemes [7]-[11]. Existing phase locking schemes could generally be categorized into two groups [9]-[13]: closed-loop phase locking (CPL) and open-loop phase locking (OPL).

CPL, commonly referred to as software phase-locked loop (SPLL), is widely used for its robustness in managing disturbance and unbalanced grid voltages. SPLL, which comprises a phase detector, a loop filter, and a voltage-controlled oscillator [7], exploits feedback control to synchronize frequency and phase; thus, it exhibits strong adaptability. The single synchronous reference frame SPLL (SRF-SPLL) [2], the enhanced SRF-SPLL based on the symmetrical component method [14], and the decoupled double SRF-SPLL (DDSRF-SPLL) [15], [16] are typical SPLL schemes widely used in recent applications. The single SRF-SPLL achieves a high performance in balanced systems. Nevertheless, the output phase of SRF-SPLL contains a second harmonic component when dealing with unbalanced grids, hence the noticeably poor steady-state behavior of the scheme. As a potential solution to this problem, the enhanced SRF-SPLL scheme was presented in [14]; under this scheme, synchronization is achieved by extracting the fundamental-frequency positive sequence (FFPS) components from unbalanced grid voltages with the symmetrical component method. However, the enhanced SRF-SPLL scheme is ineffective in cases involving frequency disturbance because the all-pass filters in its structure are designed for a specific grid frequency. In contrast to the enhanced SRF-SPLL scheme, the DDSRF-PLL method exploits two SRFs rotating at a synchronous grid frequency to detect the FFPS and fundamental-frequency negative sequence (FFNS) components. Moreover, this method achieves good steady-state performance even under severe unsymmetrical grid conditions. However, the influence of harmonics on most current solutions cannot be eliminated completely even by adopting additional filtering processes or decreasing system bandwidth, which can only reduce the influence at the cost of increasing the transient time of SRF-SPLL methods [11], [17]-[18].

In addition, the implementation of these algorithms is cumbersome, and the transient period is not fast enough because of the use of proportional-integral-based controllers [8], [11]. Generally, a grid period of more than 0.5 is required for CPL methods to trace new phase angles in severe unbalanced conditions [11], [16], [18]. The proper parameters of controllers are difficult to design under distorted grid conditions; moreover, a relatively long dynamic process is necessary for controllers to operate well. Hence, CPL schemes are unable to achieve rapid phase synchronization.

On the contrary, OPL methods, which are free from the self-tuning closed-loop control, are characterized by their rapid phase synchronization and have thus attracted great attention [8], [11]-[13], [19]-[21]. In particular, zero-crossing phase detection, which involves the detection of the zero crossings of utility signals as zero grid phase references as well as phase calculations, is the earliest and the simplest OPL method [7], [21]. This method is widely used across industries under normal grid conditions and in cases that do not rigorously require control precision. However, the drawbacks are obvious; that is, the real-time phase angle of positive sequence components cannot be obtained, and the need for the high-performance control of grid-tied inverters cannot be satisfied [4], [7]. The low-pass notch filter PLL [8] is able to lock phase angles within the grid period of 0.5 to 1, and it shows robustness to harmonic distortion and grid imbalance. Although this method is effective in dealing with amplitude asymmetry, it is unable to obtain correct results in cases involving an unsymmetrical phase. Most other OPL methods mainly focus on specific grid conditions, and their filters are designed accordingly to realize fast phase locking; examples of such methods include the weighted least-square estimation scheme [13], low-pass filtering transformation angle detector, [19] etc.

In sum, a desirable phase locking method should exhibit strong robustness even in unbalanced and distorted utility conditions and be able to achieve a good dynamic and steady-state performance that satisfies the need for the high-performance control of grid-tied inverters [4], [9], [22], [23]. Hence, this study develops a novel fast OPL based on a synchronous reference frame (OPL-SRF), which possesses adaptive properties with respect to grid disturbances and remarkable dynamic performance. OPL-SRF is applicable to the amplitude and/or phase unsymmetrical grid conditions. When the grid frequency is fixed, the proposed OPL-SRF method can precisely track the synchronous phase of the unbalanced grid within 3 ms. The proposed method can also deal with the adverse effects of frequency fluctuations and voltage distortions with the aid of a frequency detector [4], [9] and the harmonic elimination method [17], [24]-[26]. Consequently, the developed OPL-SRF scheme can precisely synchronize the phase of non-ideal grids and significantly improve the phase locking speed.

 

II. PROPOSED OPL-SRF SCHEME IN A SYMMETRICAL GRID

A. OPL-SRF Scheme for a Three-phase Ideal Grid

The balanced grid voltages can be described by

where Um, θ, and ω are the magnitude, initial angle of phase a, and grid frequency, respectively.

The conversion of a stationary a-b-c frame to a rotational d-q frame [11], [15] is defined as

where

Accordingly, the grid voltages in (1) can be expressed in a d-q frame as

Assume that the initial phase agrees with θ ∈ [0, 2π). The current grid phase can thus be computed with

where

Meanwhile, the grid voltage magnitude can be obtained as

When the grid frequency changes from ω to (ω+Δω), the voltages in the d-q frame can be expressed as

Thus, the grid synchronous phase yields

Evidently, the instantaneous grid phase can still be calculated with (4) when the grid frequency changes.

A simple and fast OPL-SRF scheme for a balanced grid, which is also the fast phase calculation block of the proposed scheme in this study, can be obtained with the aforementioned equations, as shown in the red segment in Fig. 1. Apparently, the voltage magnitude and phase can be captured in real time with (4) and (5) when noise, imbalance, and harmonics are ignored.

Fig. 1.Fundamental framework of developed OPL-SRF scheme.

B. OPL-SRF Scheme for a Single-phase Ideal Grid

The aforementioned phase locking method can also be applied to single-phase grids. Assume that the single-phase grid voltage and its virtual orthogonal signal take the forms

where Um, θ, and ω are the magnitude, initial phase, and frequency of the single-phase voltage, respectively.

The single-phase OPL-SRF utilizes the voltage in (8) to construct a virtual orthogonal signal in (9); hence, an orthogonal signal set is formed in the α-β frame, and Park's transformation can be thus performed as

where

The orthogonal signal set after Park’s transformation features the same expression as that in (3). Therefore, the magnitude and phase of the single-phase signal in (8) can be calculated with (4) and (5) instantaneously. The single-phase OPL-SRF scheme under ideal grid conditions is therefore obtained and then utilized to build the fast FFPS component construction block.

 

III. FAST FFPS COMPONENT CONSTRUCTION AND OPL-SRF SCHEME FOR UNSYMMETRICAL GRID

A. Effect of Voltage Imbalance on SRF-based Schemes

When fundamental frequency components are considered, the asymmetrical voltage can be decomposed into FFPS, FFNS, and fundamental frequency zero sequence (FFZS) components according to the symmetrical component method, i.e.,

In (11)

where, Uma, Umb, and Umc are the magnitudes of Phase a, Phase b, and Phase c of the unsymmetrical grid voltages, respectively, and θa, θb, and θc are the corresponding initial phase angles; are the magnitudes of the FFPS, FFNS, and FFZS components, respectively, and θ+, θ-, and θ0 are the corresponding initial phase angles.

The decomposition of unsymmetrical voltages is illustrated in Fig. 2.

Fig. 2.Construction of FFPS components.

When the grid voltage is unsymmetrical, the key point of phase locking schemes is to obtain the real-time phase of the FFPS components. However, the FFNS and FFZS components negatively influence the precision and stability of phase synchronization. Therefore, eliminating such negative influence quickly and achieving zero steady-state errors should be prioritized. To determine effective solutions, the negative effects of FFNS components are first analyzed. The same approach can be extended to the analysis of the effects of FFZS components.

By substituting (11) into (2), the unsymmetrical voltages can be expressed in the d-q frame as

The FFNS component results in the second harmonics in the d-q frame, which flow through the SRF-based phase locking system and cause obvious phase oscillations. The filtering technique is essential to eliminate the harmonic component, whereas the filter design must consider two self-contradictory factors. A fast dynamic response requires high bandwidth, and sufficient harmonic attenuation requires a low cut-off frequency. However, current solutions are difficult to use when seeking optimal performance. To solve this problem, this study presents a novel fast FFPS component construction method, which is characterized by high accuracy and easy implementation.

B. Novel Fast FFPS Component Construction Method

In this work, a symmetrical voltage signal is regarded as a combination of three independent single-phase voltage signals. Each single-phase voltage vector, which contains the amplitude and phase angle, can be obtained with the developed fast orthogonal signal generation method and the single-phase OPL-SRF scheme, and the FFPS components can be extracted with the symmetrical component method [27]-[30]. Hence, the exact phase angle can be captured easily by inputting the FFPS components into the three-phase OPL-SRF system.

The construction of the FFPS components (Fig. 3) is described in detail as follows.

Fig. 3.Construction of FFPS components.

1) The unsymmetrical voltage vector U in Region 1 is decomposed into three independent single-phase voltages, i.e., ua, ub, and uc (see Region 2). With the fast orthogonal signal construction method, three quadrature signals with respect to voltages ua, ub, and uc can be obtained, i.e., ua⊥, ub⊥, and uc⊥ (see Region 3). Thus, the orthogonal signal sets uaα and uaβ, ubα and ubβ, and ucα and ucβ in Region 4 can be derived. By separately applying the developed single-phase OPL-SRF method, the vector forms of ua, ub, and uc, respectively, can be obtained (Region 5).

2) According to the symmetrical component method, the FFPS, FFNS, and FFZS components U+, U-, and U0 can be obtained with the positive sequence transformation, negative sequence transformation, and zero sequence transformation, as shown in Region 6.

3) Considering that the synchronous phase of unsymmetrical voltage U is equal to that of U+, we can obtain the FFPS orthogonal signal sets by performing the single-phase inverse OPL-SRF transformation to U+ (see Region 7). The FFPS components are obtained by separating the α components from the orthogonal signal sets in Region 8. Finally, by applying the three-phase OPL-SRF scheme to the FFPS components in Region 11, the real-time synchronous phase of the unsymmetrical grid can be obtained.

To simplify the calculation process (Fig. 3), an equivalent matrix is introduced in the extraction of the FFPS components.

Separating the FFPS components from the unsymmetrical grid voltage in the vector notation yields

where the virtual signal Ẋv (X represents U and U+) is formed by Xα and its virtual orthogonal signal Xβ and

The vector form of the virtual unsymmetrical voltage and its virtual FFPS component in the α-β frame can be described as

According to Fig. 3 and the construction rule for virtual orthogonal signals illustrated by (8), (9), and (10), the following results can be obtained:

Considering (20)–(23), we can rewrite (18) and (19) as

The FFPS component vector, i.e., U+, can be deduced by substituting (24) and (25) into (17) and taking the real part, i.e.,

where

Accordingly, the real-time phase of the FFPS components can be obtained by substituting (26) into (2) and (4) when the random noise and harmonics in the sampled voltage signals are not considered, as shown in the green segment in Fig. 1.

 

IV. FAST AND ACCURATE ORTHOGONAL SIGNAL CONSTRUCTION METHOD

If (26) is utilized to calculate the FFPS components, then the instantaneous orthogonal components corresponding to the unbalanced voltages depicted by (22) must first be calculated.

A. Conventional Method for Constructing Virtual Orthogonal Signals

Delaying a voltage signal by quarter cycles [31], [32] and using a first differential operator [33] are two typical methods for constructing virtual orthogonal signals.

First, (12) and (22) are rewritten as

where l ∈ {a,b,c}.

Based on the comparison of (27) and (28), the orthogonal signal for the first method can be expressed as

Obviously, this method exhibits a slow dynamic response because of the time delay, which causes poor real-time phase locking.

Contrasting (27) and (28) shows that

where [⋅]' is the first differential operator.

By discretizing (30), the orthogonal voltages are calculated as

where ΔT is the sampling time of the SRF-OPL system.

The sampling frequency fs in this work is 10 kHz.

Evidently, the first differentiation is merely an approximate expression of the orthogonal signal; hence, the amplitude and phase errors of the orthogonal signal increase with an increase in ΔT (see Fig. 4). Consequently, a high fs is required; yet, the random noise in the sampling process is further amplified under this condition.

Fig. 4.Error of orthogonal signal constructed with the first differential method. fs is (a) 0.4 kHz, (b) 0.6 kHz, (c) 0.8 kHz, and (d) 1.0 kHz.

Considering the random noise in the sampling process, we can rewrite (31) as

The physical quantities with the superscript “~” indicate the existence of harmonics and/or random noise.

In (32),

where |unoise| is the possible maximal noise value and Fdif is the noise amplification factor of the first differential method in the worst condition.

The random noise is amplified according to (32) and (34). The amplification factor Fdif increases at a high sampling frequency (see Fig. 5). Therefore, the first differential method is extremely sensitive to noise. A low-pass filter (LPF) with a low cut-off frequency is usually utilized in practical applications to attenuate noise signals sufficiently; however, the dynamic behavior of the method is easily affected, and the expected fast orthogonal signal generation cannot be achieved.

Fig. 5.Noise amplification factor versus sampling frequency.

B. Proposed Orthogonal Signal Construction Method

First, (27) and (28) are rewritten as

Hence,

By discretizing and combining (37) and (38), the orthogonal voltages of the kth sampling can be calculated as

Based on (39), the improved method for constructing orthogonal voltage signals, which is also the first functional block of the developed phase locking scheme, is illustrated in Fig. 6.

Fig. 6.Noise amplification factor and response time versus K.

Unlike the first differential method, (39) is obtained without any approximation. Hence, the improved method can track orthogonal signals accurately, and its high accuracy is independent of fs (see Figs. 4 and 5). Thus, the improved method can effectively avoid the errors caused by orthogonal signal approximation in a wide sampling frequency range.

C. Noise Immunity Analysis

Random noise exists inevitably in the sampled grid voltages and causes phase errors in a steady state.

To evaluate the noise effect on the improved method, we first rewrite (39) as

In (40),

where Fimp is the possible maximal noise amplification factor of the improved method in the worst condition.

Evidently, the improved method is also sensitive to noise, and its noise amplification factor in the worst condition is equal to that of the first differential method (see Fig. 5). Therefore, decreasing fs is essential in limiting noise amplification. Unlike the first differential method, the improved method yields orthogonal signals with high accuracy, which is independent of the sampling frequency. Accordingly, a proper time scaling can limit noise amplification in an acceptable range.

Let ΔT in (39) and (40) be replaced with KΔT. The noise amplification factor of the improved method in the worst condition can be rewritten as

Similarly, the response time increases by a factor of K. Fig. 6 shows the relationship of noise amplification factor and response time versus K. The noise amplification factor decreases remarkably, and the response time increases linearly with K.

Consequently, a good compromise between noise reduction and response speed must be reached. In this work, K is set to 20, and the response time is increased to 2 ms accordingly. Therefore, the maximum noise amplification factor in the worst condition is 3, and the remaining noise can be attenuated sufficiently by adopting the low-bandwidth LPFs set in the d-q frame. In this work, the cut-off frequency of such low-bandwidth LPF is set to 1 kHz.

To test the noise immunity of the proposed method, we provide a specific example in Fig. 7. In this example, the voltage at Node 1 contains 1.0 p.u. ideal voltage signal (red wave) and 0.05 p.u. noise signal (blue wave at Node 4). The constructed orthogonal signal at Node 3 is illustrated in Fig. 7(b). Unlike the ideal orthogonal signal (green wave at Node 2), the constructed signal contains a certain amount of amplified noise induced by the construction method. Extracting the amplified noise from the constructed orthogonal signal at Node 3 and comparing the amplified noise with the original noise (see Fig. 7(c)) reveal that the noise amplification is not as serious as that depicted in Fig. 6. The maximal values of the original and amplified noise are 0.05 and 0.06 p.u., respectively. This outcome is attributed to the condition in Fig. 6 being obtained in the worst situation and not for most cases. Furthermore, the amplified noise can be attenuated sufficiently with the low-bandwidth LPF. The filtered noise signal at Node 5 is very weak, as shown in the black curve in Fig. 7(c). Consequently, the constructed orthogonal signal after filtering (the blue curve in Fig. 7(d)) is smooth enough, and the noise immunity of the proposed construction method is further enhanced.

Fig. 7.Noise immunity test. (a) Designed experiment; (b) Constructed signal before filtering; (c) Noise before/after filtering; (d) Constructed orthogonal signal after filtering.

Therefore, the developed fast orthogonal signal construction method is characterized by noise immunity and high accuracy, thus effectively avoiding approximation errors and noise amplification. It can also generate orthogonal signals within 2.5 ms to achieve rapid FFPS component separation and significantly improve phase locking speed. Meanwhile, sufficiently attenuating random noise is feasible with the proposed noise immunity improvement method. Therefore, the signals are virtually unaffected, and the synchronized phase is accurate.

 

V. OVERALL DIAGRAM OF DEVELOPED OPL-SRF SCHEME

Fig. 8 shows the overall diagram of the proposed OPL-SRF scheme, which consists of a signal preprocessing block, a fast orthogonal signal generation block, a fast FFPS component construction block, a fast phase calculation block, and a frequency detection block.

Fig. 8.Diagram of proposed OPL-SRF scheme for three-phase utility.

In Fig. 8, the pre-LPF with a cut-off frequency of 10 kHz is utilized to preprocess the sampled voltage signals. Such practice is widely adopted in the industry. The use of the frequency detection block and harmonic elimination algorithm in the fast phase calculation block is optional and mainly depends on grid conditions. For a public grid, its frequency is usually fixed, and the frequency detection block can be cancelled to achieve the shortest response time possible.

Frequency shift and harmonic distortion are two possible scenarios. Frequency adaptive and anti-harmonic abilities are consequently important in phase locking. Given that the delayed signal cancellation (DSC) solution is not originally derived in this work, frequency detection and harmonic elimination are introduced briefly as follows. Their detailed analysis and implementation are available in the literature.

A. Harmonic Elimination Algorithm

The developed construction method can also be adopted when the grid voltage is distorted; however, (39) should be revised as (44), i.e., harmonics are present in the output signal.

where h(k) is the harmonic component.

By eliminating the harmonics in (44), the fundamental frequency orthogonal signal of the distorted voltage can also be obtained. In addition, the harmonic elimination of the developed OPL-SRF scheme is achieved in the d-q frame. In this situation, the voltage with harmonics in the d-q frame can be expressed as

Therefore, the pure DC components can be obtained by eliminating the harmonics in the d-q frame, and the fast phase calculation can be performed accordingly, as shown in Fig. 8.

The moving average filter (MAF) [17] and DSC [26], as well as their derivatives [24-26], can eliminate harmonics completely. The models of the MAF and DSC for eliminating the nth harmonic in the continuous time domain can be expressed as

where hn represents the nth harmonic and Tn denotes its period.

As shown in (46) and (47), the dynamic response time of both the MAF and DSC is only relevant to the harmonic period. Therefore, all the grid harmonics can be eliminated thoroughly with either the MAF or DSC. Fig. 9 shows the processes of eliminating the second harmonic with the MAF and DSC.

Fig. 9.Eliminating a given harmonic with MAF/DSC. (a) Amplitude is 0.2 p.u.; (b) Amplitude is 0.4 p.u.

The response time of DSC is usually shorter than that of the MAF, especially when eliminating a specific harmonic. Then, the DSC method is utilized to eliminate the harmonics and strengthen the anti-harmonic ability of the OPL-SRF scheme.

B. Frequency Detection Algorithm

The grid frequency information is required in virtual orthogonal signal construction and in rotational coordinate transformation. The theoretical analysis indicates that a high-precision grid frequency is not necessary in the proposed OPL-SRF method. The phase error becomes negligible when the frequency fluctuation is within ±0.5 Hz (which is also the basic requirement for frequency offset in power grids) and when the nominal synchronous frequency instead of the real-time frequency is utilized in the phase calculation.

A frequency detector can be utilized in cases involving large frequency errors or when real-time frequency information is required. Several well-designed methods proposed in [11], [17], [34] are able to rapidly and accurately detect frequencies fast with immunity to random noise.

 

VI. EXPERIMENTAL VERIFICATION

The balanced and unbalanced grids are considered in the experimental verification. Dynamic responses are studied under different conditions to examine the phase synchronization behavior of the developed OPL-SRF scheme. Sudden amplitude, phase, frequency change, and sudden harmonic introduction are considered separately and simultaneously.

The experiments are performed using DSP TMS320F28335 as the controller to realize the developed OPL-SRF scheme. The input voltage signals are generated with an identical DSP system. D/A converters are used to obtain the analog frequency and phase and thereby visualize the experimental results.

A. Three-Phase Balanced System

The experimental results under balanced conditions are shown in Fig. 10. The grid voltage shows amplitude of 1.0 p.u. and a frequency of 50 Hz under normal operating conditions.

Fig. 10.Phase synchronization in a balanced grid. Phase response (a) with amplitude jumping, (b) with phase jumping, and (c) with frequency jumping; (d) frequency response with frequency jumping (e) without DSC scheme and (f) with DSC scheme.

Fig. 10(a) shows the result of a sudden decrease in amplitude from 1.0 p.u. to 0.6 p.u. In this situation, the ratio between Ud and Uq stays unchanged; consequently, the synchronized phase is almost unaffected during this time interval. Therefore, the dynamic response speed is the fastest when only the grid voltage amplitude varies.

Fig. 10(b) demonstrates the phase synchronization process when the phase angle increases from 0 to π/2. The ratio between Ud and Uq varies in this case. The dynamic response of the OPL-SRF scheme depends mainly on the behavior of the orthogonal signal construction block and low-bandwidth LPFs. In this case, the transient period is nearly 2.5 ms.

Fig. 10(c) illustrates the case involving a sudden frequency change from 50 Hz to 45 Hz; in this figure, the blue dashed line is the real grid phase. During the phase synchronization, two apparent adjustment processes can be observed. One process occurs because of the induced phase change following a sudden frequency drop. The other process occurs when a new grid frequency is detected and adopted in the OPL-SRF algorithm instead of the previous one. Therefore, the transient time in this case depends mainly on the delay of the frequency detection. In this study, the method in [34] is employed for frequency detection. If a precise frequency is needed, other accurate and complex frequency detection methods, some of which are proposed in [11], [17], [22], can be utilized. The phase synchronization takes about 16 ms, with the 14 ms elapsing in frequency detection, as shown in Fig. 10(d). The phase synchronization is evidently quick and is able to function properly with respect to frequency disturbance. Fig. 10(c) also shows that the OPL-SRF scheme captures the precise grid phase within 3 ms after a frequency drop. This outcome indicates that frequency disturbance exerts minimal influence on phase accuracy and that nominal synchronous frequency can be applied directly.

Phase oscillation is inevitable under distorted grid conditions. Fig. 10(e) indicates a dynamic behavior when the fifth harmonic with amplitude of 0.2 p.u. is imposed on the grid voltage, in which low-frequency phase oscillations are present. Hence, fast and precise phase locking cannot be achieved. The negative influence of harmonics is almost totally eliminated (see Fig. 10(f)) with the aid of the harmonic elimination algorithm.

B. Three-Phase Unbalanced System

The experimental results for the unbalanced system are shown in Fig. 11, where the amplitude and phase of the grid voltage are both unsymmetrical.

Fig. 11.Phase synchronization in an unbalanced grid. Phase response (a) with amplitude jumping, (b) with phase jumping, and (c) with frequency jumping; (d) frequency response with frequency jumping (e) without DSC scheme and (f) with DSC scheme.

Fig. 11(a) shows the result of the introduction of an FFNS component with an amplitude of 0.2 p.u. when the voltage decreases from 1.0 p.u. to 0.6 p.u. Fig. 11(b) presents the result of a sudden phase drop from π/2 to 0. The experimental results validate the effectiveness and the fast transient speed of the proposed algorithm in cases of sudden changes in amplitude and/or phase under unsymmetrical grid conditions. The total response time is less than 3 ms, and the steady-state performance of the proposed scheme is virtually free from random noise.

Figs. 11(c) and (d) show the result for the case involving a sudden decrease in frequency from 50 Hz to 45 Hz. Two apparent adjustment processes are also observed. One process occurs following a sudden frequency drop, and the other process occurs when a new frequency is detected. Therefore, the transient time in this case depends mainly on the delay of frequency detection. The whole dynamic process takes about 17 ms, with the 14 ms elapsing in the frequency detection process (see Fig. 11(d)). The new frequency detected is 45 Hz. Fig. 11(c) shows that the SRF-OPL scheme captures the real-time phase within about 3 ms after the frequency change. The synchronized phase can evidently remain highly accurate even without frequency adjustments.

Figs. 11(e) and (f) illustrate the results when the fifth harmonic with amplitude of 0.2 p.u. is imposed on the voltages, along with an FFNS component with amplitude of 0.2 p.u. Phase errors are inevitable when no harmonic elimination algorithm is applied (Fig. 11(e)), and such errors tend to increase in severity as harmonic amplitude increases. However, when the DSC method is employed, the phase error caused by the fifth harmonic is almost cancelled, and the transient period is fairly short (Fig. 11(f)). Evidently, a precise phase synchronization can be achieved with the proposed scheme, which is unaffected by harmonic distortion or grid imbalance.

C. Comprehensive Experiment

Fig. 12 shows the experimental result when sudden simultaneous changes in amplitude, frequency, and phase occur in distorted and unsymmetrical grids. Similarly, the dynamic response of the OPL-SRF scheme also contains two typical moments. Phase changes can be instantaneously detected following a change in grid voltage. Moreover, the previous grid frequency (50 Hz) is used in the rotational coordinate transformation in (2) before the detection of the new frequency (45 Hz). A secondary phase adjustment takes place when the new frequency is detected, resulting in another dynamic process. The application of the developed OPL-SRF algorithm takes about 23 ms in this comprehensive experiment, with the 21 ms elapsing for frequency detection. In contrast to that of current phase locking schemes, the response time of the OPL-SRF algorithm is very short, and the locked phase is accurate enough.

Fig. 12.Result of comprehensive experiment.

The noise immunity of the proposed OPL-SRF scheme is also verified in all the experiments. The phase synchronization with the developed algorithm is clearly quick, accurate, and robust, and the algorithm is able to function properly under distorted and unsymmetrical grid conditions.

D. Comparison of Dynamic Response Time

The dynamic response time of the proposed scheme is compared with that of the commonly used SSRF-SPLL and DDSRF-SPLL algorithms to determine its advancement (see Table I). The dashed line in Table I represents the case in which a scheme shows a weak dynamic/steady performance under severe grid imbalance conditions; the dynamic time of such a scheme is excluded in the comparison.

TABLE ICOMPARISON RESULT OF DYNAMIC RESPONSE TIME

The results indicate the following. 1) In a symmetrical three-phase grid, the three schemes exhibit fast dynamics, and the proposed scheme is slightly superior in terms of dynamic speed. 2) In an unsymmetrical grid, the dynamic performance of the SSRF-SPLL scheme is weak because its steady-state behavior is unsatisfactory and a compromise is made between steady and dynamic behaviors; the dynamic/steady behaviors of the DDSRF-SPLL scheme and the proposed scheme are good, and the proposed scheme shows significantly better performance in terms of dynamic speed.

 

V. CONCLUSION

The high-performance control of grid-tied inverters under severe distorted or unbalanced grid conditions requires fast and accurate phase synchronization. Traditional CPL schemes suffer from a slow dynamic response and weak performance under severe unsymmetrical grid conditions. The OPL-SRF scheme developed in this work is capable of capturing grid phase quickly and accurately. The proposed novel fast open-loop phase locking algorithm is also applicable to phase synchronization when the amplitude, phase, and/or frequency changes suddenly or when the grid is unbalanced and/or harmonically distorted. The dynamic response time is within 3 ms regardless of the presence of frequency disturbance. This characteristic represents a remarkable improvement relative to existing phase locking schemes. Consequently, the real-time performance and accuracy of phase synchronization can be guaranteed, and a desirable performance for inverter control under various grid conditions can be realized. The key points of the developed OPL-SRF scheme can be summarized as follows.

1) The developed fast virtual orthogonal signal construction method is characterized by noise immunity and high accuracy. It is also able to generate orthogonal signals within 2 ms and effectively avoid the approximation errors and noise amplification of conventional methods in a wide range of sampling frequencies.

2) The simple and fast FFPS component construction method facilitates fast phase synchronization.

3) The novel OPL-SRF scheme based on the developed methods for constructing virtual orthogonal signals and FFPS components is free from self-tuning closed-loop control and thus improves dynamic performance remarkably.

The experimental results under different operating conditions validate the developed OPL-SRF scheme. Its noise immunity, high accuracy, easy implementation, strong robustness, and remarkable response speed are also confirmed.