International Journal of Aeronautical and Space Sciences

The Korean Society for Aeronautical and Space Sciences (한국항공우주학회)
권호 표지
DOI QR코드

DOI QR Code

Design of an FPGA-Based RTL-Level CAN IP Using Functional Simulation for FCC of a Small UAV System

  • Received : 2017.08.14
  • Accepted : 2017.12.11
  • Published : 2017.12.30
Download PDF
⟨ Previous Next ⟩

Abstract

In the aerospace industry, we have produced various models according to operational conditions and the environment after development of the base model is completed. Therefore, when design change is necessary, there are modification and updating costs of the circuit whenever environment variables change. For these reasons, recently, in various fields, system designs that can flexibly respond to changing environmental conditions using field programmable gate arrays (FPGAs) are attracting attention, and the rapidly changing aerospace industry also uses FPGAs to organize the system environment. In this paper, we design the controller area network (CAN) intellectual property (IP) protocol used instead of the avionics protocol that includes ARINC-429 and MIL-STD-1553, which are not suitable for small unmanned aerial vehicle (UAV) systems at the register transistor logic (RTL) level, which does not depend on the FPGA vender, and we verify the performance. Consequentially, a Spartan 6 FPGA model-based system on chip (SoC) including an embedded system is constructed by using the designed CAN communications IP and Xilinx Microblaze, and the configured SoC only recorded an average 32% logic element usage rate in the Spartan 6 FPGA model.

Keywords

References

  1. Fang, Y. Y. and Chen, X. J., "Design and Simulation of UART Serial Communication Module Based on VHDL", Proceeding of the Intelligent Systems and Applications (ISA) Conference, 2010.
  2. Oudjida, A. K., Berrandjia, M. L., Tiar, R., Liacha, A. and Tahraoui, K., "FPGA Implementation of I 2 C & SPI Protocols: A Comparative Study", Proceeding of the Electronics, Circuits, and Systems (ICESC) Conference, 2009.
  3. Eswari, B., Ponmagal, N., Preethi, K. and Sreejeesh, S. G., "Implementation of I2C Master Bus Controller of FPGA", Proceeding of Communications and Signal Processing (ICCSP) Conference, 2013.
  4. Patil, K. S., Salunke, G. D., Mahajan, B. L. and Hiwale, A. S., "Implementation of HDLC Protocol Using FPGA", Proceeding of International Journal of Engineering Science And Technology (IJESAT) Conference, 2012.
  5. Son, Y. S., Park, J. K. and Kang, T. S., "Design and Implementation of CAN IP for Single Chip Controller Using FPGA", Proceeding of the Korean Society for Aeronautical and Space Sciences (KSAS) Conference, 2016.
  6. Donchev, B. and Hristov, M., "Implementation of CAN Controller with FPGA Structure", Proceeding of CAD System in Microelectronics Conference, 2013.
  7. Yang, J. M., Kwon, Y. S., Shin. K.S., Han. J. H., Byun. K. J., Eum. N. W., "Implementation and Verification of CAN 2.0 A,B, FD Integrated IP Based on Fault-Tolerant Vehicle Processor", Proceeding of the Institute of Electronics and Information Engineers (IEIE) Conference, 2015.
  8. Jeon, S. W., "Development of a Small Avionics Unit Based on FPGA with Soft CPU", Aerospace Engineering and Technology, Vol. 12, No. 2, 2013, pp. 131-139.
  9. Lu, Y., Wang, Z., Qiao, L. and Huang, B., "Design and Implementation of Multi-Channel High Speed HDLC Data Processor", IEEE International Conference on Communications, Circuits and Systems, and West Sino Expositions, Vol. 2, 2002, pp. 1451-1455.
  10. Jung, E. S., Lee, H. J. and Sul, S. K., "Implementation of a Fast Current Controller Using FPGA", The Transactions of the Korean Institute of Power Electronics, Vol. 12, No. 4, 2007, pp. 339-345.
  11. Oh, K. H., Shim, H. S., Park, D. H. and Ra, S. W., "Design and Implementation of Data Terminal Controller for UAV Using FPGA", Journal of The Korean Society for Aeronautical and Space Sciences, Vol. 40, No. 5, 2012, pp. 454-460. https://doi.org/10.5139/JKSAS.2012.40.5.454
  12. Chang, K. C., Digital Design & Modeling with VHDL and Synthesis, IEEE Computer Society Press, 1996.
  13. Kim, Y. S., Kim, J. H., Han, D. I., Lee, M. H., Park, J. H. and Lee, D. W., "FPGA Based HW/SW Co-Design for Vision Based Real-Time Position Measurement of an UAV", International Journal of Aeronautical and Space Sciences, Vol. 17, No. 2, 2016, pp. 232-239. https://doi.org/10.5139/IJASS.2016.17.2.232
  14. Abbas, S. H., Lee, J. R. and Kim, Z., "FPGA-Based Design and Implementation of Data Acquisition and Real-Time Processing for Laser Ultrasound Propagation", International Journal of Aeronautical and Space Sciences, Vol. 17, No. 4, 2016, pp. 467-475. https://doi.org/10.5139/IJASS.2016.17.4.467
  15. Xilinx, "7 Series FPGAs PCB Design Guide(UG483)", Xilinx, 2017, pp. 2-76.
  16. Xilinx, "Spartan-6 FPGA Configuration User Guide(UG380)", Xilinx, 2009, pp. 2-174.