A Low-Computation Indirect Model Predictive Control for Modular Multilevel Converters

Abstract

The modular multilevel converter (MMC) has become a promising topology for high-voltage direct current (HVDC) transmission systems. To control a MMC system properly, the ac-side current, circulating current and submodule (SM) capacitor voltage are taken into consideration. This paper proposes a low-computation indirect model predictive control (IMPC) strategy that takes advantages of the conventional MPC and has no weighting factors. The cost function and duty cycle are introduced to minimize the tracking error of the ac-side current and to eliminate the circulating current. An optimized merge sort (OMS) algorithm is applied to keep the SM capacitor voltages balanced. The proposed IMPC strategy effectively reduces the controller complexity and computational burden. In this paper, a discrete-time mathematical model of a MMC system is developed and the duty ratio of switching state is designed. In addition, a simulation of an eleven-level MMC system based on MATLAB/Simulink and a five-level experimental setup are built to evaluate the feasibility and performance of the proposed low-computation IMPC strategy.

I. INTRODUCTION

The modular multilevel converter (MMC) has become a promising topology for high-voltage direct current (HVDC) applications. When compared with other converters, the MMC has inherent salient features such as modularity and scalability. Recently, studies on capacitor voltage balancing, circulating current control, new topologies and fault-tolerant control of the MMC have drawn the attention of a lot of researchers [1]-[4]. In addition, the MMC has been applied to diverse high-voltage high-power applications such as flexible HVDCs, power electronic transformers, and static synchronous compensators [5]-[10].

One of the primary challenges is to eliminate the circulating current flowing through three phases of the MMC. In practice, the circulating current emerges due to the difference between the DC-link voltage and the sum of the upper and lower arm voltages. The circulating current, if not properly controlled, inevitably increases the rating values of the converter components, the amplitude of the capacitor voltage ripples and the converter losses [11]-[13]. Moreover, an active control strategy is ordinarily used to keep the submodule (SM) capacitor voltages balanced [14].

Model predictive control (MPC) has been widely adopted in power converter applications due to its inherent advantages such as fast dynamic response, multi-objective control capability and easy implementation [15]-[18]. However, the conventional MPC strategy can result in a heavy computational burden. As a result, it has a much longer calculation time to reach the optimal control output. In [19] and [20], the total number of available switching states, which need to be calculated within a sampling period, unfortunately reaches to \(C_{2N}^{N}\), where N is the number of SMs within each arm. In practice, the MMC is expected to have a large number of SMs. Therefore, it is difficult to ensure the real-time property of the controller. To address this issue, a finite control set model predictive control (FCS-MPC) strategy is proposed in [21], which reduces the number of the calculated switching states to N+1. The main drawback of the aforementioned control strategies is that the weighting factors are usually selected according to empirical rules, which significantly increases the complexity of the controller design [22].

Various sorting algorithms have been studied to maintain the SM capacitor voltages within an acceptable range [24]-[26]. A fast sorting algorithm for a MMC with a large number of SMs is proposed in [24]. In [25], a predictive algorithm is proposed for a MMC with a low switching frequency. However, these algorithms are complex in implementation.

This paper proposes a low-computation indirect model predictive control strategy for MMC systems, which precisely tracks the ac-side current reference and eliminates the circulating current. The optimized merge sort (OMS) algorithm is introduced to keep the SM capacitor voltages balanced. A discrete-time model of a MMC is developed to predict the behavior of the MMC states one step ahead. The cost function and duty cycle are defined to select the best number of inserted SMs within each arm to minimize the ac-side current tracking error and to eliminate the circulating current. The performance of the proposed IMPC strategy is evaluated based on simulation and experimental results.

The rest of this paper is organized as follows. The discrete-time mathematical model of the MMC is reviewed in Section II. The proposed IMPC strategy is presented in Section III. In Section IV and Section V, simulation and experimental results are given to verify the feasibility of the proposed strategy. Some conclusions are drawn in Section VI.

II. MMC MATHEMATICAL MODEL

The topology of a three-phase MMC is shown in Fig. 1, where each phase bridge has two identical arms (i.e., an upper arm and a lower arm). Each arm consists of N identical half-bridge SMs, one arm inductor and one equivalent resistor. Here, i_pj and i_nj (j = a, b, c) are the upper and lower arm currents, respectively. v_gj is the grid-side voltage. u_pj and u_nj are the upper and lower arm voltages, respectively. u_j and i_j represent the output voltage and current of phase j, respectively.

Fig. 1. Topology of a three-phase MMC system.

Based on Fig. 1, the mathematical equations that govern the system dynamic behavior can be obtained as:

\(L \frac{\mathrm{d} i_{\mathrm{pj}}}{\mathrm{d} t}+L_{1} \frac{\mathrm{d} i_{\mathrm{j}}}{\mathrm{d} t}=\frac{U_{\mathrm{dc}}}{2}-u_{\mathrm{pj}}-v_{\mathrm{gj}}-R i_{\mathrm{pj}}-R_{1} i_{\mathrm{j}}\)       (1)

\(L \frac{\mathrm{d} i_{\mathrm{nj}}}{\mathrm{d} t}+L_{1} \frac{\mathrm{d} i_{\mathrm{j}}}{\mathrm{d} t}=\frac{U_{\mathrm{dc}}}{2}-u_{\mathrm{nj}}-v_{\mathrm{gj}}-R i_{\mathrm{nj}}-R_{1} i_{\mathrm{j}}\)       (2)

The ac-side current and inner unbalanced current that flow through both the upper and lower arms are expressed by:

\(i_{\mathrm{j}}=i_{\mathrm{pj}}-i_{\mathrm{nj}}\)       (3)

\(i_{\text {diff } j}=\frac{i_{\mathrm{pj}}+i_{\mathrm{nj}}}{2}=\frac{i_{\mathrm{dc}}}{3}+i_{\mathrm{cj}}\)       (4)

where, i_dc/3 is the dc component of the inner unbalanced current, and i_cj is the circulating current that flows through three phases and has a negative sequence component. It needs to be eliminated because circulating current increases the arm current and power loss [27].

The sum and difference of the upper and lower arm voltages can be defined as:

\(u_{\mathrm{sumj}}=u_{\mathrm{pj}}+u_{\mathrm{nj}}\)       (5)

\(u_{\mathrm{subj}}=u_{\mathrm{nj}}-u_{\mathrm{pj}}=\frac{\left(n_{\mathrm{nj}}-n_{\mathrm{pj}}\right)}{N} \cdot \frac{U_{\mathrm{dc}}}{2}\)       (6)

where, n_pj and n_nj represent the number of inserted SMs in the upper and lower arms, respectively.

Neglecting the arm equivalent resistor R, the external and internal dynamics of the MMC are represented by:

\(\frac{\mathrm{d} i_{\mathrm{j}}}{\mathrm{d} t}=\frac{1}{L^{\prime}}\left(e_{\mathrm{j}}-v_{\mathrm{gj}}-R_{1} i_{\mathrm{j}}\right)\)       (7)

\(\frac{\mathrm{d} i_{\mathrm{diff} j}}{\mathrm{d} t}=\frac{1}{2 L}\left(U_{\mathrm{dc}}-u_{\mathrm{sumj}}-2 R i_{\mathrm{diff} j}\right)\)       (8)

where, L’ =L/2+L_l. e_j is identified as the intern electromotive force (EMF) of the phase j [23], which can be expressed as:

\(e_{\mathrm{j}}=\frac{u_{\mathrm{nj}}-u_{\mathrm{pj}}}{2}=\frac{n_{\mathrm{nj}}-n_{\mathrm{pj}}}{N} \cdot \frac{U_{\mathrm{dc}}}{2}\)       (9)

Based on Equ. (7) and Equ. (8), and assuming a sampling period of T_s with an Euler approximation [19], a discrete-time model of the ac-side current and inner unbalanced current can be yielded as:

\(\begin{aligned} i_{j}(k+1)=& \frac{2 L^{\prime}-T_{\mathrm{s}} R_{1}}{2 L^{\prime}+T_{\mathrm{s}} R_{1}} i_{\mathrm{j}}(k)+\frac{2 T_{\mathrm{s}}}{2 L^{\prime}+T_{\mathrm{s}} R_{1}} e_{\mathrm{j}}(k+1) \\ &-\frac{2 T_{\mathrm{s}}}{2 L^{\prime}+T_{\mathrm{s}} R_{\mathrm{l}}} v_{\mathrm{gj}}(k+1) \end{aligned}\)       (10)

\(\begin{aligned} i_{\text {diff}j}(k+1) &=\frac{2 L-T_{\mathrm{s}} R}{2 L+T_{\mathrm{s}} R} i_{\text {diff}j}(k) \\ &+\frac{T_{\mathrm{s}}}{2 L+T_{\mathrm{s}} R}\left[U_{\mathrm{dc}}(k)-u_{\mathrm{sumj}}(k)\right] \end{aligned}\)       (11)

where, x(k+1) and x(k) (x=i_j or i_diffj) denote the predicted value and measured value, respectively. v_gj(k+1) is the predicted value of the grid voltage, which is equal to v_gj(k) when T_s is sufficiently small [19].

III. PROPOSED CONTROL STRATEGY

According to the principle of the conventional MPC, the predicted value of the state variable monotonously changes within a sampling period. To reduce the average tracking error in a sampling period, the prediction process is divided into two stages in which the duty cycle is newly introduced. As mentioned in the previous section, the proposed IMPC strategy has three control objectives. The cost function is designed to regulate the ac-side current. A control strategy is proposed to eliminate the circulating current. The OMS algorithm is introduced to keep the SM capacitor voltages balanced.

A. Determination of the Duty Cycle

Based on the proposed IMPC strategy, the trajectory of the state variable is shown in Fig. 2. \(\overrightarrow{A C}\) and \(\overrightarrow{C D}\) denote Switch 1 and Switch 2, respectively. x_jref and x_j(k+1) are the reference value and predicted value of the state variable x_j, respectively. x_j¹ and x_j² represent the final predicted value of x_j when the switching state is maintained at Switch 1 and Switch 2 within a sampling period, respectively. It can be observed that the value of x_j increases along the direction of \(\overrightarrow{A B}\) until x_j = x_d. Then it decreases to x_jref along the direction of \(\overrightarrow{A E}\) at the end of the sampling period. According to geometric relations, \(\overrightarrow{A C}\) and \(\overrightarrow{C D}\) can be derived by:

\(\left\{\begin{array}{l} \overrightarrow{A C}=\frac{t_{\mathrm{d}}-k T_{\mathrm{s}}}{T_{\mathrm{s}}} \cdot \overrightarrow{A B} \\ \overrightarrow{C D}=\frac{(k+1) T_{\mathrm{s}}-t_{\mathrm{d}}}{T_{\mathrm{s}}} \cdot \overrightarrow{A E} \end{array}\right.\)       (12)

Fig. 2. Trajectory of the state variable within a sampling period.

The discrete-time model can be deduced as:

\(x_{\mathrm{j}}(k+1)-x_{\mathrm{j}}(k)=\overrightarrow{A C} \cdot \sin \theta_{\mathrm{j}}^{1}-\overrightarrow{C D} \cdot \sin \theta_{\mathrm{j}}^{2}\)       (13)

where， \(\sin \theta_{\mathrm{j}}^{1}=\left(x_{\mathrm{j}}^{1}-x_{\mathrm{j}}(k)\right) /|\overrightarrow{A B}|, \quad \sin \theta_{\mathrm{j}}^{2}=\left(x_{\mathrm{j}}(k)-x_{\mathrm{j}}^{2}\right) /|\overrightarrow{A E}|\).

Substituting Equ. (12) into Equ. (13), the switching time of Switch 1 and Switch 2 can be derived as:

\(t_{\mathrm{d}}=\frac{x_{\mathrm{j}}(k+1)+k x_{\mathrm{j}}^{1}-(k+1) x_{\mathrm{j}}^{2}}{x_{\mathrm{j}}^{1}-x_{\mathrm{j}}^{2}} T_{\mathrm{s}}\)       (14)

Since k=0 at the beginning of each sampling period and x_j(k+1) can precisely tracks x_jref within the sampling period, the duty cycle can be expressed by:

\(d_{\mathrm{j}}=\frac{x_{\mathrm{jref}}-x_{\mathrm{j}}^{2}}{x_{\mathrm{j}}^{1}-x_{\mathrm{j}}^{2}}\)       (15)

B. AC-Side Current Tracking

For grid-connected MMC systems, the primary objective is to ensure that the ac-side current can precisely track the reference current. Since the number of SMs inserted in each arm is N within each sampling period, the total number of inserted SMs combinations of the upper and lower arms is N+1, which can be expressed by:

\(\left(n_{\mathrm{pj}}, n_{\mathrm{nj}}\right) \in[(N, 0),(N-1,1), \cdots,(1, N-1),(0, N)]\)       (16)

Hence, e_j and u_subj can also be described by:

\(\left\{\begin{array}{l} e_{\mathrm{j}}(k) \in \frac{1}{2} \cdot\left[(N-0) \frac{U_{\mathrm{dc}}}{N},(N-2) \frac{U_{\mathrm{dc}}}{N}, \cdots,(0-N) \frac{U_{\mathrm{dc}}}{N}\right] \\ u_{\mathrm{subj}} \in\left[(N-0) \frac{U_{\mathrm{dc}}}{N},(N-2) \frac{U_{\mathrm{dc}}}{N}, \cdots,(0-N) \frac{U_{\mathrm{dc}}}{N}\right] \end{array}\right.\)       (17)

Considering the tracking error of the ac-side current, a cost function is defined as:

The cost function is calculated one step ahead for all of the possibilities in the control action. The best control action, which makes the cost function result in a minimum positive value, is selected as Switch 1. The corresponding difference between the upper and lower arm voltages is represented as u¹_subj. To avoid the multilevel step of the ac-side voltage, u²_subj, which is selected as Switch 2, should be adjacent to u¹_subj. Assuming that u¹_subj < u²_subj and ignoring the fluctuations of the SM capacitor voltages, u²_subj can be expressed as:

\(u_{\mathrm{subj}}^{2}=u_{\mathrm{subj}}^{1}+2 \frac{U_{\mathrm{dc}}}{N}\)       (19)

Based on (15), the duty cycle of Switch 1 can be defined as:

\(d_{\mathrm{j}}=\frac{i_{\mathrm{jref}}-i_{\mathrm{j}}^{2}}{i_{\mathrm{j}}^{1}-i_{\mathrm{j}}^{2}}\)       (20)

where, i_j¹ and i_j² can be obtained by substituting e_j(k) from Equ. (10) with u¹_subj/2 and u²_subj /2, respectively.

C. Circulating Current Control

Ideally, the number of inserted SMs in the upper and lower arms is constant. When additional SMs are inserted, the voltage across the upper and lower arms is higher than the DC-side voltage. Consequently, the circulating current decreases. Similarly, when additional SMs are bypassed, the circulating current increases. According to the changing rate of the circulating current, the circulating current can be eliminated by inserting or bypassing additional SMs. Thus, u¹_sumj can be rewritten as:

\(u_{\text {sumi }}(k) \in\left[(N-S) \cdot \frac{U_{\mathrm{dc}}}{N}, N \cdot \frac{U_{\mathrm{dc}}}{N},(N+S) \cdot \frac{U_{\mathrm{dc}}}{N}\right]\)       (21)

where, S denotes the number of the additional SMs which are inserted or bypassed to eliminate the circulating current.

Hence, the inner unbalanced current can be rewrite as:

\(\left\{\begin{array}{ll}i_{\text {diff}j}(k+1)=i_{\text {diff}j}^{+} & (N+S \text { inserted } \operatorname{SMs}) \\ i_{\text {diff}j}(k+1)=i_{\text {diff}j}^{0} & (N \text { inserted SMs }) \\ i_{\text {diff}j}(k+1)=i_{\text {diff}j}^{-} & (N-S \text { inserted } \text { SMs })\end{array}\right.\)       (22)

The duty cycle of the switching state can be rewritten as:

\(\left\{\begin{array}{l} d_{\mathrm{diff} j}=d_{\mathrm{diff} j}^{+}=\frac{i_{\mathrm{diff}}^{\mathrm{ref}}-i_{\mathrm{diff}j}^{0}}{i_{\mathrm{cj}}^{+}-i_{\mathrm{cj}}^{0}}(\text { inserted } \mathrm{SMs}) \\ d_{\mathrm{diff} j}=d_{\mathrm{diff} j}^{-}=\frac{i_{\mathrm{diff}}^{\mathrm{ref}}-i_{\mathrm{diff}j}^{0}}{i_{\mathrm{diff}j}^{-}-i_{\mathrm{diff}j}^{0}}(\text { bypassed } \mathrm{SMs}) \end{array}\right.\)       (23)

where, \(i_{\text {diff }}^{\text {ref }}\) is the reference of the inner unbalanced current.

According to Equ. (9) and Equ. (10), the predicted value of the ac-side current is affected when additional SMs are inserted or bypassed. To address this issue, a new control strategy is proposed to minimize the tracking error of the ac-side current while eliminating the circulating current.

Fig. 3(a) shows the voltages across the upper and lower arms without enabling the circulating current control. The average value of u_subj within a sampling period is derived as:

\(\bar{u}_{\text {subj }}=d_{\mathrm{j}} u_{\text {subj }}^{1}+\left(1-d_{\mathrm{j}}\right) u_{\text {subj }}^{2}\)       (24)

Fig. 3. Arm voltages of an MMC within a sampling period.

Figs. 3(b) and (c) show the voltages across the upper and lower arms after the circulating current control strategy is activated. The average value of u_subj is rewritten as:

\(\begin{aligned} \tilde{u}_{\text {subj }}=&\left(d_{\mathrm{j}}-\left|\frac{d_{\text {diff}j}}{2}\right|\right) u_{\text {subj }}^{1}+d_{\text {diff}j}\left(u_{\text {subj }}^{1}-\frac{U_{\mathrm{dc}}}{N}\right) \\ &+\left[1-\left(d_{\mathrm{j}}-\left|\frac{d_{\text {diff}j}}{2}\right|\right)\right] u_{\text {subj }}^{2} \end{aligned}\)       (25)

Obviously, \(\bar{u}_{\text {subj }}\) is equal to \(\tilde{u}_{\text {subj }}\). The proposed strategy has no effect on the ac-side current tracking task. It is worth noting that d_j > d_diffj / 2 under normal operation.

D. Capacitor Voltage Balancing

The sorting algorithm is ordinarily regarded as an effective method to keep the SM capacitor voltages balanced. When the system has a relatively small number of SMs, the bubble sort algorithm is identified as a reasonable choice. In practice, an MMC-HVDC system is expected to have a large number of SMs. Therefore, an advanced algorithm is critical to ensure the real-time performance of the controller.

Merge sort takes the idea of divide and conquer. The SM capacitor voltages are divided into two subsequences. The two subsequences are sorted recursively. Finally, the two sorted subsequences are merged to get the final sorting result. Ideally, the capacitor parameters for all of the SMs are identical. The SM capacitor voltages in the same arm are divided into two groups: the inserted group and the bypassed group. The inserted group consists of inserted SMs and the bypassed group consists of the bypassed SMs. Taking an arm with 4 SMs as an example, the variations of the capacitor voltages are demonstrated in Fig. 4. SM1 and SM4 are bypassed and SM2 and SM3 are inserted within a sampling period. Therefore, the order of the SM capacitor voltages in the two groups is fixed despite the fact that the overall order of the capacitor voltages has changed.

Fig. 4. Change in the capacitor voltages of 4 SMs.

According to the change characteristic of the SM capacitor voltage and the principle of merge sort, an optimized merge sort (OMS) algorithm is introduced to coordinate the proposed IMPC strategy [28]. The sorting result can be easily generated by merging two ordered capacitor voltage sequences at the end of a sampling period. In practice, the SM capacitor parameters are generally different, which results in different voltage changes within a sampling period. To achieve a better control performance, the pointer ascending and pointer descending OMSs are applied according to the direction of the arm current. When compared with the conventional merge sort algorithm, the time complexity of the OMS is reduced from O(nlogn) to O(n).

Fig. 5 shows the execution time of the bubble sort, merge sort and OMS. The execution time of the bubble sorting algorithm exponentially increases when the number of SMs increases in Fig. 5(a). When compared with the bubble sort, the merge sort exhibits an advantage in terms of the execution time when the MMC has a huge number of SMs. Fig. 5(b) shows that the OMS algorithm can further reduce the execution time.

Fig. 5. Comparison of three sorting algorithms.

When the arm current is positive, the pointer ascending OMS is applied to sort the SM capacitor voltages. The N_on SMs with the lowest capacitor voltages are inserted, and the others are bypassed. Similarly, when the arm current is negative, the pointer descending OMS is utilized. The N_off SMs with the highest capacitor voltages are inserted, and the others are bypassed.

The implementation procedure of the proposed IMPC strategy is depicted in Fig. 6. The proposed IMPC strategy is evaluated by J_k for all of the available switching states. The switching state that produces the minimum positive value of J_k, is selected as Switch 1. After determining u_subj¹ and u_subj², the duty cycles d_j and d_diffj can be easily computed. Consequently, the ac-side current tracking and elimination of the circulating current can be implemented. In addition, the OMS algorithm is applied to keep the capacitor voltage balanced.

Fig. 6. Flowchart of the proposed IMPC strategy.

IV. SIMULATION RESULTS

To verify the feasibility of the proposed low-computation IMPC strategy, a three-phase MMC system with 10 SMs per arm is built in MATLAB/Simulink. This is done in conjunction with the control system shown in Fig. 7. The parameters of the simulated system are given in Table I.

Fig. 7. Block diagram of the proposed IMPC strategy.

TABLE I PARAMETERS OF THE SIMULATED SYSTEM

A. Proposed IMPC Strategy

The set-points for the active and reactive power are set to P=60 kW and Q=0 kVar. Initially, the system operates in a steady-state mode and the control strategy of Fig. 3(a) is applied. The circulating current control strategy is disabled. At t=0.2s, the control strategy of Fig. 3(b) and (c) is enabled to eliminate the circulating current. Fig. 8 exhibits the dynamic response of the system to the circulating current control activation commands.

Fig. 8(a) shows the phase-A current, which precisely tracks its sinusoidal reference. The circulating current control strategy has no effect on the tracking accuracy. Fig. 8(b) illustrates the three-phase inner unbalanced currents, which are regulated at I_dc/3. The amplitude of the circulating current is reduced by 40% after t=0.2s. SM5 capacitor voltages of three-phase are shown in Fig. 8(c). The OMS algorithm keeps all of the capacitor voltages balanced. The amplitude of the capacitor voltage ripples around the reference falls from 4.5% to 2.5%. Fig. 8(d) and (e) show the upper and lower arm currents of phase A and three-phase currents, respectively. Subsequent to the circulating current control strategy activation command, the amplitude and distortion of the arm currents are both reduced while the three-phase currents is kept sinusoidal.

Fig. 8. Simulation results of the proposed IMPC strategy. (a) Phase-A current. (b) Three-phase inner unbalanced currents. (c) SM5 capacitor voltages of three-phase. (d) Upper and lower arm Currents of phase A. (e) Three-phase currents.

The simulation results shown in Fig. 8 verify the capability and performance of the proposed IMPC strategy and the overall system controller shown in Fig. 7 to track the ac-side current, accomplish the capacitor voltages balancing task, and eliminate circulating current.

B. Dynamic Response of the MMC to a Power Step

Originally, the system operates in the steady-state mode where P=60 kW and Q=0 kVar. At t=0.3s, the active power flowing from the DC-side to the ac-side steps up to 80 kW. At t=0.6s, the reactive power steps up to 10 kVar. Fig. 9 shows the dynamic response of the system to a power step.

Fig. 9. Dynamic response of the MMC to a power step. (a) Phase-A current. (b) Three-phase inner unbalanced currents. (c) SM5 capacitor voltages of three-phase. (d) Upper and lower arm currents of phase A. (e) Three-phase currents.

Fig. 9(a) shows the active and reactive power components on the ac-side of the system, which are regulated at their corresponding reference values. Fig. 9(b) illustrates the three-phase inner unbalanced current, which is subsequent to the step of power demand. They are regulated at their reference value (i.e., I_dc/3) during the steady state and under transients. The circulating currents have negligible amplitudes. Fig. 9(c) shows the phase-A current, which tracks its sinusoidal reference fairly quickly and precisely. Fig. 9(d) shows the SM5 capacitor voltages of three-phase, which are kept balanced in response to a power step. As shown in Fig. 9(e), the three-phase currents are kept sinusoid subsequent to the power step. The results of Fig. 9 verify the satisfactory performance of the controller in response to a power step.

C. Comparison Between IMPC and FCS-MPC

To verify the performance of the proposed IMPC strategy, simulation results of the proposed strategy and the conventional FCS-MPC are shown in Fig. 10 and Fig. 11, respectively. The active and reactive power components are set to 60 kW and 0 kVar, respectively.

Fig. 10. Simulation results of the proposed IMPC strategy. (a) Phase-A current. (b) Three-phase inner unbalanced currents. (c) SM5 capacitor voltages of three-phase. (d) Upper and lower arm currents of phase A. (e) Three-phase current.

Fig. 11. Simulation results of the traditional FCS-MPC strategy. (a) Phase-A current. (b) Three-phase inner unbalanced currents. (c) SM5 capacitor voltages of three-phase. (d) Upper and lower arm currents of phase A. (e) Three-phase current.

Fig. 10(a) and Fig. 11(a) show the phase-A current. The proposed IPMC strategy can tracks the reference current more precisely than the conventional FCS-MPC. Under steady state operation, the total harmonic distortion (THD) of the phase current is less than 0.46%, which is lower than the 2.39% of the conventional FCS-MPC. Fig. 10(b) and Fig. 11(b) show the three-phase inner unbalanced currents. When compared with Fig. 11(b), the amplitude of the circulating current, as shown in Fig. 10(b), is reduced by 40%. Fig. 10(c) and Fig. 11(c) show the SM5 capacitor voltages of three-phase. There is approximately a 40% reduction in the amplitude of the capacitor voltages in Fig. 10(c) when compared with those in Fig. 11(c). Fig. 10(d) and Fig. 11(d) show the upper and lower arm currents of phase A. The amplitude of the arm currents in Fig. 10(d) is lower when compared with Fig. 11(d). The three-phase currents shown in Fig. 10(e) are identical to those in Fig. 11(e).

These simulation results verify the advantages of the proposed control strategy in terms of current tracking, capacitor voltage balancing, and elimination of circulating current.

V. EXPERIMENTAL RESULTS

To evaluate the feasibility of the proposed strategy, a threephase experimental setup has been built. The topology and control diagram are shown in Fig. 12. The key parameters are listed in Table II.

Fig. 12. Topology and control diagram of the experimental setup.

TABLE II PARAMETERS OF THE EXPERIMENTAL SETUP

A. Setup Description

The experimental setup of a 3-phase MMC is made up of 4 SMs per arm, as shown in Fig. 13. Each of the SMs includes an H-bridge, dc capacitor and measurement elements. A complex programmable logic device is selected as the SM controller, and an IKW20N60T IGBT is used as the switch of the SM.

Fig. 13. Experimental setup of a MMC. (a) Main circuit. (b) Control board. (c) Cascaded SMs.

The central controller is implemented on a digital signal processer (model TMS320F28335), where the proposed IMPC strategy is implemented. A field programmable gate array (model XC3S500E) was chosen as the local controller in which the OMS algorithm is programmed in Verilog. Communication between the central controller and the local controller is carried out by optical fiber for the sake of reliability.

B. Experimental Results

Initially, the system operates in the steady-state with the control strategy shown in Fig. 3(a). The circulating current control strategy is activated subsequent to t=t_s. The experimental results are shown in Fig. 14.

Fig. 14. Experimental results of the proposed control strategy. (a) Phase-A current and reference. (b) Upper/lower arm currents of phase-A. (c) Upper arm current and inner unbalanced current of phase-A. (d) Capacitor voltages of SM1 and SM5 of phase-A.

Fig. 14(a) shows that the phase-A current is a standard sinusoid and that the tracking error is small. Fig. 14(b) shows the upper and lower arm currents, which become sinusoidal subsequent to the circulating current control strategy activation command. The upper arm current and inner unbalanced currents are shown in Fig. 14(c), where the inner unbalanced current is regulated at its reference value after t=t_s.. As a result, the circulating currents have negligible amplitudes. Fig. 14(d) shows the capacitor voltages of SM1 and SM5, which demonstrates that the OMS algorithm can effectively keep the capacitor voltages balanced. Moreover, the magnitude of capacitor voltage ripples is reduced by 11% after t = t_s..

The obtained experimental results verify the accuracy of the simulation results and the feasibility of the proposed low-computation IMPC strategy in terms of current tracking, capacitor voltage balancing and elimination of the circulating current of the MMC.

VI. CONCLUSIONS

In this paper, a low-computation IMPC strategy was proposed for the control of a MMC systems. A discrete-time model is derived to minimize the cost function associated with the ac-side current control. A new circulating current control strategy is proposed and its duty cycle is designed. The capacitor voltage is regulated by utilizing the OMS algorithm. The proposed IMPC strategy, in conjunction with the OMS algorithm, has a low computational burden. Simulation and experimental results highlight the satisfactory performance of the proposed control strategy in terms of its capability to carry out the ac-side current tracking task, the capacitor voltage balancing task, and the elimination of circulating currents. In addition, the proposed control strategy is suitable for applications with numerous SMs.