ONO 버퍼층을 이용한 Metal/Ferroelectrics/Insulator/Semiconductor 구조의 제작 및 특성

Fabrication and Properties of Metal/Ferroelectrics/Insulator/Semiconductor Structures with ONO buffer layer

  • 이남열 (한국전자통신연구원 집적회로연구부 다기능소자팀) ;
  • 윤성민 (한국전자통신연구원 집적회로연구부 다기능소자팀) ;
  • 유인규 (한국전자통신연구원 집적회로연구부 다기능소자팀) ;
  • 류상욱 (한국전자통신연구원 집적회로연구부 다기능소자팀) ;
  • 조성목 (한국전자통신연구원 집적회로연구부 다기능소자팀) ;
  • 신웅철 (한국전자통신연구원 집적회로연구부 다기능소자팀) ;
  • 최규정 (한국전자통신연구원 집적회로연구부 다기능소자팀) ;
  • 유병곤 (한국전자통신연구원 집적회로연구부 다기능소자팀) ;
  • 구진근 (한국전자통신연구원 집적회로연구부 다기능소자팀)
  • 발행 : 2002.07.01

초록

We have successfully fabricated a Metal-Ferroelectric-Insulator-Semiconductor (MFIS) structure using Bi$\sub$4-x/La$\sub$x/Ti$_3$O$\sub$12/ (BLT) ferroelectric thin film and SiO$_2$/Nitride/SiO$_2$ (ONO) stacked buffer layers for single transistor type ferroelectric nonvolatile memory applications. BLT films were deposited on 15 nm-thick ONO buffer layer by sol-gel spin-coating. The dielectric constant and the leakage current density of prepared ONO film were measured to be 5.6 and 1.0 x 10$\^$-8/ A/$\textrm{cm}^2$ at 2MV/cm, respectively, It was interesting to note that the crystallographic orientations of BLT thin films were strongly effected by pre-bake temperatures. X-ray diffraction patterns showed that (117) crystallites were mainly detected in the BLT film if pre-baked below 400$^{\circ}C$. Whereas, for the films pre-baked above 500$^{\circ}C$, the crystallites with preferred c-axis orientation were mainly detected. From the C-V measurement of the MFIS capacitor with c-axis oriented BLT films, the memory window of 0.6 V was obtained at a voltage sweep of ${\pm}$8 V, which evidently reflects the ferroelectric memory effect of a BLT/ONO/Si structure.

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