ETRI Journal

Electronics and Telecommunications Research Institute (한국전자통신연구원)
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Characteristics of P-channel SOI LDMOS Transistor with Tapered Field Oxides

  • Kim, Jong-Dae (Electronics and Telecommunications Research Institute (ETRI)) ;
  • Kim, Sang-Gi (Division of Electronics and Telecommunications Research Institute) ;
  • Roh, Tae-Moon (Micro-Electronics Technology Laboratory, ETRI) ;
  • Park, Hoon-Soo (Uiduk University) ;
  • Koo, Jin-Gun (Power device team, Electronics and Telecommunications Research Institute (ETRI)) ;
  • Kim, Dae-Yong (Micro-Electronics Technology Laboratory, Semiconductor Proessing Department, ETRI)
  • Received : 1998.09.01
  • Published : 1999.09.30
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Abstract

A new tapered TEOS oxide technique has been developed to use field oxide of the power integrated circuits. It provides better uniformity of less than 3 % and reproducibility. On-resistance of P-channel RESURE (REduced SURface Field) LDMOS transistors has been optimized and improved by using a novel simulation and tapered TEOS field oxide on the drift region of the devices. With the similar breakdown voltage, at $V_{gs}$=-0.5V, the specific on-resistance of the LDMOS with the tapered field oxide is about $31.5{\Omega}{\cdot}cm^2$, while that of the LDMOS with the conventional field oxide is about $57m{\Omega}{\cdot}cm^2$.

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References

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