대한전자공학회논문지SD (Journal of the Institute of Electronics Engineers of Korea SD)

대한전자공학회 (The Institute of Electronics and Information Engineers)
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High-Bandwidth DRAM용 온도 및 전원 전압에 둔감한 1Gb/s CMOS Open-Drain 출력 구동 회로

A Temperature- and Supply-Insensitive 1Gb/s CMOS Open-Drain Output Driver for High-Bandwidth DRAMs

  • 김영희 (昌原大學校 電子工學科) ;
  • 손영수 (浦港工科大學校 電子電氣工學科) ;
  • 박홍준 (浦港工科大學校 電子電氣工學科) ;
  • 위재경 (現代電子 메모리 開發硏究所) ;
  • 최진혁 (現代電子 메모리 開發硏究所)
  • Kim, Young-Hee (Department of Electronic Engineering Changwon National University) ;
  • Sohn, Young-Soo (Department of Electrical Engineering University of Pohang Science and Technology(POSTECH)) ;
  • Park, Hong-Jung (Department of Electrical Engineering University of Pohang Science and Technology(POSTECH)) ;
  • Wee, Jae-Kyung (Memory R&D, Hynix Semiconductor) ;
  • Choi, Jin-Hyeok (Memory R&D, Hynix Semiconductor)
  • 발행 : 2001.08.01
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초록

High-bandwidth DRAM을 위해 1Gb/s의 데이터 전송률까지 동작하고 그 출력 전압 스윙이 온도와 전원 전압(VDD) 변동에 무관한 CMOS open-drain 출력 구조 회로를 설계하였다. 출력 구동 회로는 여섯 개의 binary-weighted NMOS 트랜지스터로 구성되는데, 이 여섯 개 중에서 ON시킬 current control register의 내용은 추가 호로 없이 DRAM 칩에 존재하는 auto refresh 신호를 이용하여 새롭게 수정하였다. Auto refresh 시간 구간동안 current control register를 수정하는데, 이 시간 구간동안 부궤환 (negative feedback) 동작에 의해 low level 출력 전압($V_OL$)이 저전압 밴드갭 기준전압 발생기(bandgap reference voltage generator)에 의해서 만들어진 기준전압($V_{OL.ref}$)과도 같도록 유지된다. 테스트 칩은 1Gb/s의 데이터 전송률까지 성공적으로 동작하였다. 온도 $20^{\circ}C$~$90^{\circ}C$, 전원 전압 2.25V~2.75V영역에서 최악의 경우 제안된 출력 구동 회로의 $V_{OL.ref}$와 $V_OL$의 변동은 각각 2.5%와 725%로 측정된 반면, 기존의 출력 구동 회로의 $V_OL$의 변동은 같은 온도의 전원 접압의 영역에 대해 24%로 측정되었다.

A fully on-chip open-drain CMOS output driver was designed for high bandwidth DRAMs, such that its output voltage swing was insensitive to the variations of temperature and supply voltage. An auto refresh signal was used to update the contents of the current control register, which determined the transistors to be turned-on among the six binary-weighted transistors of an output driver. Because the auto refresh signal is available in DRAM chips, the output driver of this work does not require any external signals to update the current control register. During the time interval while the update is in progress, a negative feedback loop is formed to maintain the low level output voltage ($V_OL$) to be equal to the reference voltage ($V_{OL.ref}$) which is generated by a low-voltage bandgap reference circuit. Test results showed the successful operation at the data rate up to 1Gb/s. The worst-case variations of $V_{OL.ref}$ and $V_OL$ of the proposed output driver were measured to be 2.5% and 7.5% respectively within a temperature range of $20^{\circ}C$ to $90^{\circ}C$ and a supply voltage range of 2.25V to 2.75V, while the worst-case variation of $V_OL$ of the conventional output driver was measured to be 24% at the same temperature and supply voltage ranges.

키워드

참고문헌

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