한국전기전자재료학회논문지 (Journal of the Korean Institute of Electrical and Electronic Material Engineers)

  • 제20권2호
  • /
  • Pages.113-117
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  • 2007
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  • 1226-7945(pISSN)
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  • 2288-3258(eISSN)
한국전기전자재료학회 (The Korean Institute of Electrical and Electronic Material Engineers)
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EEPROM 셀에서 폴리실리콘 플로팅 게이트의 도핑 농도가 프로그래밍 문턱전압에 미치는 영향

Effects of Doping Concentration in Polysilicon Floating Gate on Programming Threshold Voltage of EEPROM Cell

  • 장성근 (청운대학교 디지털방송공학과) ;
  • 김윤장 (매그나칩 반도체)
  • 발행 : 2007.02.01
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초록

We have investigated the effects of doping concentration in polysilicon floating gate on the endurance characteristics of the EEPROM cell haying the structure of spacer select transistor. Several samples were prepared with different implantation conditions of phosphorus for the floating gate. Results show the dependence of doping concentration in polysilicon floating gate on performance of EEPROM cell from the floating gate engineering point of view. All of the samples were endured up to half million programming/erasing cycle. However, the best $program-{\Delta}V_{T}$ characteristic was obtained in the cell doped at the dose of $1{\times}10^{15}/cm^{2}$.

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참고문헌

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