대한전자공학회논문지SD (Journal of the Institute of Electronics Engineers of Korea SD)

대한전자공학회 (The Institute of Electronics and Information Engineers)
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밀결합 전송선 상에서 전력 저감을 위한 코드워드 생성 기법

A Codeword Generation Technique to Reduce Dynamic Power Consumption in Tightly Coupled Transmission Lines

  • 임재호 (숭실대학교 컴퓨터공학부) ;
  • 김덕민 (숭실대학교 컴퓨터공학부) ;
  • 김석윤 (숭실대학교 컴퓨터공학부)
  • Lim, Jae-Ho (School of Computer Science, Soongsil University) ;
  • Kim, Deok-Min (School of Computer Science, Soongsil University) ;
  • Kim, Seok-Yoon (School of Computer Science, Soongsil University)
  • 투고 : 2011.01.19
  • 발행 : 2011.11.25
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초록

반도체 공정의 발달로 인해 칩의 집적도가 높아졌으며, 연결선 사이의 간격 또한 좁아지게 되었다. 그로 인해 연결선 내에 존재하는 커패시턴스와 인덕턴스가 증가하게 되었고, 특히 전역 연결선들에서는 자신의 그라운드 커패시턴스보다 인접한 다른 연결선과의 결합 커패시턴스가 더욱 커지는 경향을 보이게 되었다. 이러한 현상으로 인해 발생하는 유도성 결합과 용량성 결합은 인접한 연결선의 신호 간섭으로 심각한 문제를 야기할 수 있다. 본 논문에서는 추가적인 연결선을 이용하여 신호 무결성을 저해시키는 누화잡음을 제거하면서, 입력 데이터의 확률을 고려하여 동적 전력 소모를 최소화하는 코드워드 생성 기법을 제안하였다. 제안한 기법의 성능평가를 위해 FastCap 및 FastHenry 프로그램과 HSPICE를 이용하여 실험한 결과, 소모 전력에서 기존 기법보다 평균 15% 정도의 감소를 보임을 확인하였다.

As semiconductor process rapidly developed, the density of chips becomes higher and the space between adjacent lines narrows smaller. This trend increases the capacitance and inductance in interconnects and the coupling-capacitance of adjacent lines grows even bigger than the self-capacitance of themselves, especially in global interconnects. Inductive and capacitive coupling observed in these phenomena may cause serious problems in signal integrity. This paper proposes a codeword generation technique using extra interconnect lines to reduce the crosstalk caused by inductive and capacitive coupling and to reduce dynamic power consumption considering probability of input data. To estimate the performance of the proposed technique, the experimental results have been obtained using FastCap, FastHenry and HSPICE, and it has been shown that the power consumption using the proposed technique has yielded approximately 15% less than the results of the previous technique.

키워드

참고문헌

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