JSTS:Journal of Semiconductor Technology and Science

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An 8-Gb/s Inductorless Adaptive Passive Equalizer in 0.18-㎛ CMOS Technology

  • Moon, Joung-Wook (Departmemt of Electrical and Electronic Engineering, Yonsei Univeristy) ;
  • Choi, Woo-Young (Departmemt of Electrical and Electronic Engineering, Yonsei Univeristy)
  • Received : 2012.02.09
  • Published : 2012.12.31
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Abstract

This paper presents an inductorless 8-Gb/s adaptive passive equalizer with low-power consumption and small chip area. The equalizer has a tunable RC filter which provides high-frequency gain boosting and a limiting amplifier that restores the signal level from the filter output. It also includes a feedback loop which automatically adjusts the filter gain for the optimal frequency response. The equalizer fabricated in $0.18-{\mu}m$ CMOS technology can successfully equalize 8-Gb/s data transmitted through up to 50-cm FR4 PCB channels. It consumes 6.75 mW from 1.8-V supply voltage and occupies $0.021mm^2$ of chip area.

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References

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  1. An Adaptive Equalizer for High-Speed Receiver using a CDR-Assisted All-Digital Jitter Measurement vol.15, pp.2, 2015, https://doi.org/10.5573/JSTS.2015.15.2.155