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Electronics and Telecommunications Research Institute (한국전자통신연구원)
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Optimization of Material and Process for Fine Pitch LVSoP Technology

  • Eom, Yong-Sung (Components & Materials Research Laboratory, ETRI) ;
  • Son, Ji-Hye (Components & Materials Research Laboratory, ETRI) ;
  • Bae, Hyun-Cheol (Components & Materials Research Laboratory, ETRI) ;
  • Choi, Kwang-Seong (Components & Materials Research Laboratory, ETRI) ;
  • Choi, Heung-Soap (Department of Mechanical & Design Engineering, Hongik University Sejong)
  • Received : 2012.11.26
  • Accepted : 2013.05.10
  • Published : 2013.08.01
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Abstract

For the formation of solder bumps with a fine pitch of 130 ${\mu}m$ on a printed circuit board substrate, low-volume solder on pad (LVSoP) technology using a maskless method is developed for SAC305 solder with a high melting temperature of $220^{\circ}C$. The solder bump maker (SBM) paste and its process are quantitatively optimized to obtain a uniform solder bump height, which is almost equal to the height of the solder resist. For an understanding of chemorheological phenomena of SBM paste, differential scanning calorimetry, viscosity measurement, and physical flowing of SBM paste are precisely characterized and observed during LVSoP processing. The average height of the solder bumps and their maximum and minimum values are 14.7 ${\mu}m$, 18.3 ${\mu}m$, and 12.0 ${\mu}m$, respectively. It is expected that maskless LVSoP technology can be effectively used for a fine-pitch interconnection of a Cu pillar in the semiconductor packaging field.

Keywords

References

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