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Finite State Model-based Predictive Current Control with Two-step Horizon for Four-leg NPC Converters

  • Yaramasu, Venkata (Department of Electrical and Computer Engineering, Ryerson University) ;
  • Rivera, Marco (Department of Industrial Technologies, Universidad de Talca) ;
  • Narimani, Mehdi (Department of Electrical and Computer Engineering, Ryerson University) ;
  • Wu, Bin (Department of Electrical and Computer Engineering, Ryerson University) ;
  • Rodriguez, Jose (Electronics Engineering Department, Universidad Tecnica Federico Santa Maria)
  • Received : 2014.05.08
  • Accepted : 2014.10.06
  • Published : 2014.11.20

Abstract

This study proposes a finite-state model predictive controller to regulate the load current and balance the DC-link capacitor voltages of a four-leg neutral-point-clamped converter. The discrete-time model of the converter, DC-link, inductive filter, and load is used to predict the future behavior of the load currents and the DC-link capacitor voltages for all possible switching states. The switching state that minimizes the cost function is selected and directly applied to the converter. The cost function is defined to minimize the error between the predicted load currents and their references, as well as to balance the DC-link capacitor voltages. Moreover, the current regulation performance is improved by using a two-step prediction horizon. The feasibility of the proposed predictive control scheme for different references and loads is verified through real-time implementation on the basis of dSPACEDS1103.

Keywords

NOMENCLATURE

DC-link voltage

v Converter voltage

i Load (output) current

i∗ Reference load current

Cdc DC-link capacitance [C1 C2]T

Lf Filter inductance [Lfa Lfb Lfc]T

Rf Filter leakage resistance [Rfa Rfb Rfc]T

R Load resistance [Ra Rb Rc]T

Ln, Rn Neutral inductance and its leakage resistance

Lnl, Rnl Non-linear load inductance and resistance

Ts Sampling time

N Prediction horizon

x Time-varying quantity

 

I. INTRODUCTION

Imbalanced and non-linear loads cause a large amount of neutral current in three-phase four-wire systems. Hence, conventional three-leg, three-phase power converters are unsuitable for such applications. Correspondingly, four-leg converters provide the best path for neutral currents [1]-[3]. Many applications, including distributed generation, universal power quality conditioners, electric drives, shunt active power filters, and active front-end rectifiers, that utilize four-leg converters require precise current control [4]-[8].

Multilevel diode-clamped converters reach high power levels with reduced common mode voltages, total harmonic distortion, and electromagnetic interference [9]. Hence, these converters are highly suitable for medium-voltage, high-power applications. Moreover, diode-clamped converters employ clamping diodes and cascaded DC capacitors to produce AC voltage waveforms with multiple levels [10]. Three-level diode-clamped converters commonly known as neutral-point-clamped (NPC) converters are used in numerous high-power, medium-voltage industrial applications [11]. These four-leg NPC converters provide a promising topology in four-wire, medium-voltage systems, as well as offer full utilization of DC-link voltage and less stress on the DC-link capacitors [12], [13]. Both carrier-based and three-dimensional space vector modulations are available for four-leg converters [12]-[18].

The finite-state or finite control set model predictive control (FCS-MPC) is a simple, intuitive, and powerful class of receding horizon control algorithm [19] controlling power converters with diverse and complex control challenges and restrictions [20], [21]. The tool is a true model-based optimization control strategy involving a large number of calculations [22]-[24]. Accordingly, available digital implementation platforms, such as microprocessors, digital signal processors, and field-programmable gate arrays, can handle such computations. Recent scholarly works demonstrate the easy application of the FCS-MPC in various power converters [25]-[34].

This study proposes an FCS-MPC to regulate the load currents while minimizing the imbalance between the DC-link capacitor voltages in a four-leg NPC converter. These objectives are expressed as a cost function. The future values of the control variables for each possible switching state of the converter are predicted using the discrete-time model of the system. The switching state that minimizes the cost function and meets the control goals is then selected and applied to the converter. Variable prediction is conducted over one or more sample periods. The one-step prediction horizon provides simplified analysis and computational cost, such that is widely applied in FCS-MPC works on power converters [25], [30]-[32]. Refs. [35] and [36] used simulations to demonstrate the control performance improvement under a prediction horizon of more than one step. However, Ref. [37] has reported that its feasibility is only verified by real-time implementation for three-phase converters, but not for four-leg converters. This study uses the concept of two-step prediction to improve the regulation of load currents for different reference and load conditions. The experimental results are presented using the dSPACE DS1103 rapid prototyping real-time implementation platform to validate the feasibility of the proposed control method.

The remainder of this paper is organized as follows: Section II presents the mathematical model of the converter. Section III explains the proposed control strategy. Section IV discusses the experimental results. Section V draws the conclusions.

 

II. FOUR-LEG NPC CONVERTER TOPOLOGY

A three-phase, four-leg NPC converter with an output L filter is shown in Fig. 1. This converter presents a connection format similar to that of the conventional three-phase NPC converter, albeit with an additional leg connected to the neutral point of the load. The converter is composed of 16 active switches and 8 clamping diodes. The switching states and the corresponding converter terminal voltages are shown in Table I. The table shows that (a) only two switches are conducted at any time and (b) switch pairs (S1x, ) and (S2x, ) operate in a complementary manner [10]. A total of 81 (34) switching combinations are available for this converter.

Fig. 1.Topology of the four-leg NPC converter with arbitrary load.

The voltage in any phase-x of the converter measured from the negative point of the DC-link (N) is expressed in terms of switching states and DC-link capacitor voltages as follows (Table I):

TABLE ISWITCHING STATES AND CONVERTER TERMINAL VOLTAGES (x = a, b, c, n)

The preceding converter voltages are expressed with respect to the mid-point (n) of the neutral leg as follows:

By solving Eqs. (1) and (2), the load voltages are expressed in terms of switching states and DC-link capacitor voltages as follows:

The equivalent circuit of the four-leg NPC converter with an output L filter is shown in Fig. 2.The variables in the figure are defined in the Nomenclature section. Subscripts a, b, and c represent the three phases. n and o represent the converter and load neutrals, respectively. By applying Kirchhoff's voltage law in Fig. 2, the converter AC side voltages are expressed in terms of load voltages, load currents, and load neutral current as follows:

Fig. 2.Representation of L filter and load connected to the four-leg NPC converter.

where Rf = Rfa = Rfb = Rfc and Lf = Lfa = Lfb = Lfc.

The relationship between the load currents and the load neutral current is obtained as follows:

By substituting Eq. (5) into Eq. (4), the converter AC side voltages can be expressed independent of the load neutral current as follows:

Where

The differential load currents from Eq. (6)are expressed as follows:

The DC-link capacitor voltages are expressed in terms of DC-link capacitor currents as follows:

The capacitor currents (i.e., are estimate during the three-phase load currents (i.e., and the converter switching states as follows:

where Kx and Qx depend on the voltage levels, such that

where Sn and Sx correspond to the neutral and phase levels, respectively. sgn is the argument sign with a value corresponding to 0, 1, or −1.

Based on Eqs. (7) and (9), the load currents and the DC-link capacitor voltages are related to the switching states. Moreover, they are controlled by choosing a proper switching state.

 

III. FINITE-STATES MODEL PREDICTIVE CONTROL

A. Control Strategy

The proposed predictive control aims to regulate the load currents and balance the DC-link capacitor voltages (Fig. 3). The proposed FCS-MPC uses the discrete-model of the system, current state (k) load currents, DC-link capacitor voltages, and 81 switching states to predict the future behavior of the control variables.

Fig. 3.Proposed FCS-MPC control scheme for a four-leg NPC converter.

A cost function is utilized to evaluate the predictions. The switching state leading to the minimal value of the cost function is chosen and directly applied to the converter. The proposed FCS-MPC does not require linear current regulators (i.e., PI controllers) and modulation.

The 81 switching states at sampling time k are used to predict the converter voltage vk for the one-step prediction horizon, as shown in Fig. 4(a). The number of feasible switching states becomes 812 = 6561 for a prediction horizon of N = 2. This value provides optimal performance [38]-[40] but greater computational burden. A modified two-step prediction is used to reduce the switching changes (i.e., switching frequency) and the computational burden caused by 6561, as shown in Fig. 4(b).

Fig. 4.Control variable prediction for a four-leg NPC converter. (a) One-step prediction. (b) Modified two-step prediction.

This approach uses 81 switching states projected to the sampling time k + 2. Subsequently, the state variables achieve 81 possible conditions. The algorithm calculates all these conditions in the future sample k + 2. The control strategy chooses a switching state in the sampling instant k, which minimizes the cost function in the k + 2 sampling instant.

The system applies this switching state during the next sampling period.

B. Cost Function Design

The defined cost function has two objectives: (a) minimize the error between the predicted load currents ik+2 and theirreferences i∗k+2 and (b) balance the DC-link capacitor voltages. These control objectives are represented as follows:

where λdc is the weighting factor adjusted according to the desired performance.

The future reference currents are obtained by fourth-order Lagrange extrapolation using present and past current references. This process is demonstrated as follows [41]:

The final cost function is defined as follows:

The switching state that minimizes the cost function is chosen and applied at the next sampling instant. Additional constraints (e.g., switching frequency reduction, current limitation, and spectrum shaping) can be included by adding them in the cost function [20].

C. Predictive Variables with Two-step Horizon

As shown in Fig. 3, the cost function requires predicted load currents ik+2 and capacitor voltages in discrete-time form.The load current prediction is obtained from continuous time state–space system in Eq. (7) as follows:

where

The load current prediction at the k + 2 instant is obtained as follows:

Comparing Eq. (17) with Eq. (14), the same converter voltage vector is used in both k + 1 and k + 2 predictions.

The first-order nature of the state equations describes the model in Eqs. (1)-(10). Hence, this study considers a first-order forward Euler approximation for the derivative providing sufficient accuracy. The calculation is as follows:

By substituting Eq. (18) in Eq. (8), the DC-link capacitor voltages are represented in discrete-time form as follows:

where Ts is the sampling time, and C1 and C2 are the capacitances of the DC-link capacitors-1 and -2, respectively.

The DC-link capacitor currents are expressed in discrete-time as follows:

The DC-link capacitor voltages for the two-step prediction are obtained by shifting variables into one future sample. This process is exhibited as follows:

where

 

IV. REAL-TIME IMPLEMENTATION AND VALIDATION

The block diagram of the experimental setup for the proposed finite-state model predictive control of the four-leg NPC converter is shown in Fig. 5. The MATLAB/Simulink software is used along with a real-time implementation block set for all the control and feedback syntheses. The DS1103 controller is employed to handle the control processes (e.g., load current prediction and cost function minimization). The load currents and the DC-link capacitor voltages are measured using LEM LA55-P and LV25-P transducers, respectively. The feedback from the sensors is sent to the controller through the CP1103 I/O connector. The DC power supply is obtained by employing the Xantrex XDC-600-20.

Fig. 5.Experimental setup block diagram.

The predictive controller directly generates the gating signals. These signals are then sent to the converter through the SKHI22B gate drivers. The experimental results are obtained during the steady and transient states with balanced, unbalanced, and non-linear loads considering a sampling time of Ts = 100 μs. The converter and controller parameters are summarized in Table II. The performance index parameters (i.e., , % total harmonic distortion (THD) and fsw) are defined in Refs. [42] and [43]. The one-step and the proposed two-step predictions are shown in Figs. 6 and 7, respectively. A balanced reference of 10 A (rms) and a balanced load of 10 Ω are considered. The load currents with one step-prediction are shown in Fig. 6(a). This approach produces 5% reference tracking error and 3.8%THD. The average switching frequency fsw is 1996 Hz. The converter line–line voltage vab produces higher dv/dts and THD, as shown in Fig. 6(b). The load currents with the proposed two-step prediction are shown in Fig. 7(a). , THD, and fsw are 3.3%, 3.1%, and 724 Hz, respectively. Furthermore, the switching frequency significantly decreases with the proposed approach. and THD are lower than those in the one-step predictiondespite the 2.8 times lower switching frequency. This method gives a new approach of controlling high-power converters that requiresan operation with alower switching frequency. The converter line–line voltage shown in Fig. 7(b) produces low dv/dts compared to the one-step prediction. The fast Fourier transform window shows that the peak magnitude of the harmonics is lower with the two-step prediction. The error between the DC-link capacitor voltages lowers with the two-step prediction.

Fig. 6.Experimental results of the one-step prediction during steady state with balanced references and balanced resistive load. (a) Ch1: phase-a output current (10 A/div); Ch2: phase-b output current (10 A/div); Ch3: phase-c output current (10 A/div); and Ch4: output neutral current (10 A/div). (b) Ch1: DC-link capacitor-1 voltage (100 V/div); Ch2: DC-link capacitor-2 voltage (100 V/div); Ch3: difference between the DC-link capacitor voltages (5 V/div); and Ch4: converter line–line voltage (200 V/div).

Fig. 7.Experimental results of the modified two-step prediction during steady state with balanced references and balanced resistive load. (a) Ch1: phase-a output current (10 A/div); Ch2: phase-b output current (10 A/div); Ch3: phase-c output current (10 A/div); and Ch4: output neutral current (10 A/div). (b) Ch1: DC-link capacitor-1 voltage (100 V/div); Ch2: DC-link capacitor-2 voltage (100 V/div); Ch3: difference between the DC-link capacitor voltages (5 V/div); and Ch4: converter line–line voltage (200 V/div).

TABLE IIFOUR-LEG NPC CONVERTER AND CONTROLLER PARAMETERS

The experimental results of the unbalanced references (i.e., =12A, =10A, and =8A) and the balanced loads (i.e., Ra = Rb = Rc = 10 Ω) are presented in Fig. 8. The setup in the figure is a typical application for the three-phase, four-wire systems with different load demands in each phase. The controller independently handles each phase current. Hence, the load currents track to their references with less steady-state error, as shown in Fig. 8(a). The neutral current, which is the sum of the three-phase currents, flows through the fourth NPC leg. The neutral current in the four-leg NPC converter does not circulate through the DC-link capacitors, unlike the case of three-leg NPC converters. Hence, the DC-link capacitor voltages remain balanced, as shown in Fig. 8(b). The converter line–line voltage perfectly shows five voltage levels. , %THD, and fsw are similar to the operating conditions of the previous balanced references and loads (Fig. 7). The operating condition discussed in Fig. 8 is repeated with the combined unbalanced resistive load and non-linear load (Fig. 9). The unbalanced load values are Ra = 8 Ω, Rb = 10 Ω, Rc = 12 Ω.The non-linear load values are Rnl = 20 Ω and Lnl = 2.5 mH. The load variation information is not provided to the predictive controller. The controller chooses a switching state producing a minimal error in the reference tracking and DC-link capacitor voltages even though the load parameters change. Consequently, the load currents effectively track to their references [Fig. 9(a)]. The DC-link capacitor voltages are also perfectly balanced [Fig. 9(b)]. , %THD, and fsw are 4.1%, 3.6%, and 1235 Hz, respectively. This increase is insignificant although these values are higher than those of the previous operating condition (Fig. 8). This operating condition demonstrates that the proposed FCS-MPC controller is robust and handles the load parameter variations. The transient analysis is conducted considering the balanced loads (i.e., Ra = Rb = Rc = 12 Ω). A balanced step change in the reference currents is applied from “no load” to 10 A(rms) in the first case (Fig. 10). The load currents track to the references with fast rise time and no overshoot [Fig. 10(a)]. The DC-link capacitors are perfectly balanced even under the no-load condition [Fig. 10(b)]. Step change is applied from the balanced reference currents (i.e., = = = 10 A at 60 Hz) to the unbalanced reference currents (i.e., = 12 A at 60 Hz, = 10 A at 120 Hz, and = 8 A at 120 Hz) in the second case (Fig. 11). The load currents track to their references and exhibit no overshoots during the transient period [Fig. 11(a)]. Accordingly, the load neutral current changes because of the changes in the reference currents. The DC-link capacitor voltages remain balanced despite of the transient change in the reference currents [Fig. 11(b)]. The effectiveness of the proposed FCS-MPC controller to track to any kind of references is exhibited in Fig. 12. A square wave reference with 5 A amplitude and 60 Hz frequency is considered. The loads are similar to those of the preceding transient-state analysis. A good load current tracking to its reference is observed with a fast and dynamic response and no oscillations in Fig. 12.

Fig. 8.Experimental results of the modified two-step prediction during steady state with unbalanced references and balanced resistive load. (a) Ch1: phase-a output current (10 A/div); Ch2: phase-b output current (10 A/div); Ch3: phase-c output current (10 A/div); and Ch4: output neutral current (10 A/div). (b) Ch1: DC-link capacitor-1 voltage (50 V/div); Ch2: DC-link capacitor-2 voltage (50 V/div); Ch3: difference between the DC-link capacitor voltages (5 V/div); and Ch4: converter line–line voltage (200 V/div).

Fig. 9.Results of the modified two-step prediction during steady state with unbalanced references and unbalanced resistive + non-linear load. (a) Ch1: phase-a output current (10 A/div); Ch2: phase-b output current (10 A/div); Ch3: phase-c output current (10 A/div); and Ch4: output neutral current (10 A/div). (b) Ch1: DC-link capacitor-1 voltage (50 V/div); Ch2: DC-link capacitor-2 voltage (50 V/div); Ch3: difference between the DC-link capacitor voltages (5 V/div); and Ch4: converter line–line voltage (200 V/div).

Fig. 10.Experimental results of the modified two-step prediction and balanced resistive load (10 Ω) during step change from “no references” to balanced references. (a) Ch1: phase-a output current (10 A/div); Ch2: phase-b output current (10 A/div); Ch3: phase-c output current (10 A/div); and Ch4: output neutral current (10 A/div). (b) Ch1: DC-link capacitor-1 voltage (50 V/div); Ch2: DC-link capacitor-2 voltage (50 V/div); Ch3: difference between the DC-link capacitor voltages (5 V/div); and Ch4: converter line–line voltage (200 V/div).

Fig. 11.Experimental results of the modified two-step prediction and balanced resistive load (10 Ω) during step change from balanced to unbalanced references. (a) Ch1: phase-a output current (10 A/div); Ch2: phase-b output current (10 A/div); Ch3: phase-c output current (10 A/div); and Ch4: output neutral current (10 A/div). (b) Ch1: DC-link capacitor-1 voltage (50 V/div); Ch2: DC-link capacitor-2 voltage (50 V/div); Ch3: difference between the DC-link capacitor voltages (5 V/div); and Ch4: converter line–line voltage (200 V/div).

Fig. 12.Experimental results of the modified two-step prediction for square wave reference and balanced resistive load (10 Ω). (a) Ch1: reference current (10 A/div) and Ch2: load current (10 A/div).

An external resistor Rx (100 Ω) is deliberately connected across the DC-link capacitorC1to verify the robustness of the proposed algorithmin minimizing the imbalance of the DC-link capacitor voltages. The balanced references of 10 A(rms) and the balanced loads of 10 Ωare considered for this test. The turn-on and turn-off signals for the relay connecting and disconnecting Rx are shown in Fig. 13(b). The controller acts in a few sampling instants even with the step-connection of the resistor. Hence, the capacitor voltages are continuously balanced [Fig. 13(b)]. The load currents continue to track to their references during this process as in Fig. 13(a). The feasibility of the proposed predictive control scheme is verified for different references and loads.

Fig. 13.Experimental results of the modified two-step prediction during steady state with balanced references, balanced resistive load (10 Ω), and a resistor across the DC-link capacitor-1. (a) Ch1: phase-a output current (10 A/div); Ch2: phase-b output current (10 A/div); Ch3: phase-c output current (10 A/div); and Ch4: output neutral current (10 A/div). (b) Ch1: DC-link capacitor-1 voltage (50 V/div); Ch2: DC-link capacitor-2 voltage (50 V/div); Ch3: difference between the DC-link capacitor voltages (5 V/div); and Ch4: converter line–line voltage (200 V/div).

The FCS-MPC strategy strongly relies on the system model and the converter and load parameters. The tests in Figs.9 and 13 validate that the FCS-MPC strategy compensates for the changes in the load and the DC-link parameter variations, respectively. The FCS-MPC strategy also effectively handles the inductive filter parameter variations [25], [41], [43]. Extreme variations in the converter and load parameters deteriorate the control performance. An online parameter estimation algorithm should be used in conjunction with the FCS-MPC strategy in such conditions [33].

This study uses a sampling time Ts of 100 μs. This value represents the minimum execution time required to perform the optimization algorithm during each sampling interval. The Ts value dictates the switching frequency fsw in the classical control techniques. However, the converter switching frequency in the FCS-MPC strategy varies according to the operating conditions. The nature of the variable-switching frequency is controlled by including a constraint in the cost function. The steady-state performance offered by the classical and predictive control techniques is almost similar. However, the latter approach provides a superior and dynamic performance because of the elimination of internal current loops and modulators [25], [28], [34], [41]. The comprehensive comparison and analysis between the classical and the proposed two-step FCS-MPC are not covered in the scope of this study. Hence, these two aspects are considered as topics for future work.

 

V. CONCLUSIONS

This study proposes a finite-set model predictive control strategy with a two-step prediction horizon to control a three-phase, four-leg NPC converter. The proposed two-step prediction significantly decreases the switching frequency while maintaining an acceptable load current quality. This method is simple and promising for the control of high-power converters. The control algorithm evaluates each of the 81 possible switching states and chooses a switching state that minimizes the cost function. The ideal minimum of the cost function is zero, which indicates that the control objectives are perfectly achieved. The load currents are tracked to their references with acceptable error using the proposed predictive control. Furthermore, the DC-link capacitor voltages are balanced during all the operating conditions. The control scheme also compensates for the perturbations in the DC-link and load parameter changes, while the load currents continue effective tracking to their references. This compensation is achieved without sacrificing the converter operation. The linear PI controllers and the modulation stage are further eliminated. As a result, a fast and dynamic response is achieved. Therefore, the proposed methodology is an attractive alternative for controlling four-leg NPC converters. The feasibility of the proposed algorithm is experimentally verified.

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