A Performance Comparison of the Current Feedback Schemes with a New Single Current Sensor Technique for Single-Phase Full-Bridge Inverters

Abstract

In this paper, a single current sensor technique (SCST) is proposed for single-phase full-bridge inverters. The proposed SCST measures the currents of multiple branches at the same time, and reconstructs the average inductor, capacitor, and load current in a single switching cycle. Since all of the branches' current in the LC filter and the load are obtained using the SCST, both the inductor and the capacitor current feedback schemes can be selectively applied while taking advantages of each other. This paper also analyzes both of the current feedback schemes from the view point of the closed-loop output impedance. The proposed SCST and the analysis in this paper are verified through experiments on a 3kVA single-phase uninterruptible power supply (UPS).

I. INTRODUCTION

Uninterruptible power supplies (UPSs) are employed to protect critical loads from shorts or long interruptions in power systems by supplying electric power continuously [3]-[6]. In terms of the voltage control in power converters including UPSs, a current controller usually contributes to stabilizing the voltage control loop [7], [8]. As a result, that many current control strategies have been studied [9]-[19]. On the other hand, there are two choices for current controllers based on the current feedback schemes, the inductor and the capacitor current feedbacks. Reference [20] has theoretically shown that the capacitor current feedback scheme gives better transient performance compared to the inductor current feedback scheme. However, capacitor current usually contains significant switching ripples. Therefore, average capacitor current sampling is a challenge issue. In addition, the over-current protection of a switching leg cannot be featured with the capacitor current feedback alone. To avoid these problems, two current sensors are employed to measure the inductor and load currents, and the capacitor current is indirectly obtained from the difference between them [7], [20]. Although this method achieves satisfactory transient performance, it increases the implementation cost, and results in unequal sensor gain issues. In order to overcome these limitations, a combined sensing has been proposed [21]. However, the bandwidth of this controller is limited by the use of a low pass filter.

This paper proposes a single current sensor technique (SCST) which enables both average inductor and capacitor current measurements in a single switching cycle. The proposed SCST simultaneously measures the load current and the negative dc-link branch current of a switching leg. After that, the inductor and the load currents are reconstructed according to the switching states. Then, the capacitor current can be easily obtained by simple manipulation of the sampled information.

Since both the inductor and capacitor currents can be measured with the proposed SCST, two current feedback schemes can be selectively implemented, which results in savings in terms of the realization cost. In order to see the performance of each feedback scheme, the closed-loop output impedances in both schemes are analyzed in the frequency domain. Even with the reconstructed current information, the analysis shows very good agreement with traditional investigation using two current sensors.

This paper is structured as follows. In section II, the SCST is proposed. The fundamental principle, the current commutation mode, and the sampling method are also introduced. In section III, the closed-loop output impedances in different current feedback schemes are presented. Practical implementation issues are addressed in section IV. In addition, the issue associated with the current sampling delay is discussed. Section V presents simulation and experimental results for a 3kVA single-phase UPS system, and the effectiveness of the proposed method is verified. Finally, some concluding remarks are given in section VI.

 

II. PROPOSED SINGLE CURRENT SENSOR TECHNIQUE

Fig. 1 shows the circuit configuration of the single-phase full-bridge inverter for UPS applications dealt with in this paper [1], [2]. The power stage consists of a full-bridge inverter and an LC filter. The inductor current, the capacitor current, and the load current are represented as iL, ic, and io, respectively. At the output of the power stage, either a linear or a nonlinear load can be connected. In the previous studies [20], [21], it has been reported that the capacitor current feedback scheme is superior in terms of harmonic elimination. However, that requires an additional current sensor to sample the load current.

Fig. 1.Full-bridge inverter for the single-phase UPS.

A. Current Reconstruction Method for Single-Phase UPSs

In order to reconstruct the load and inductor current in the proposed method, the following conditions should be fulfilled. First, the current sensing points are both the valley point and the peak point of the pulse-width modulation (PWM) carrier in a switching cycle. By doing so, the average values of the inductor and load currents can be easily measured. Second, the filter inductance and capacitance are sufficiently large, so that the load current is approximately constant in a PWM switching cycle.

Fig. 2 represents the current sensor configuration of the proposed SCST. In the proposed technique, the load current is measured together with the negative dc-link branch current of a switching leg by using a single Hall-effect current sensor. Therefore, the overlapping information of the inductor and the load current is shown at the output of the current sensor. In this figure, isensing is written as the sum of the inductor and the load current according to the switching function as follows:

Fig. 2.Proposed SCST for measuring iL, ic, and io [1], [2].

where Sb is the switching function of switching leg b. When the switching function is 1, the upper switch is turned on. Meanwhile, the lower switch is turned on when the switching function is 0. Note that Sa for switching leg a is not related to (1). In Fig. 3, the current commutation paths are illustrated according to the status of the switching function. In Fig. 3(a), both Sa and Sb are 1, and only io turns up at isensing, because iL freewheels through the upper switches. Define ivalley as the stored value of the sampled isense at the valley point of the carrier in Fig. 4. Then, ivalley corresponds to io as (2).

Fig. 3.Current commutation path according to the switching functions. (a) Sa = 1 and Sb = 1. (b) Sa = 0 and Sb = 0.

Fig. 4.Relationship among iL, ic, io, Sa, Sb, and sampling instants.

Similarly, suppose that isense is sampled at the peak of the carrier, and it is stored in ipeak. Then, the circuit configuration is the same as that in Fig. 3(b), and ipeak is represented as (3).

Assume that the inductance and capacitance are sufficiently large, so that the average value change is nearly ignored. From (2) and (3), iL is approximately obtained as:

Since iL and io are attained, ic is simply calculated. As can be seen in Fig. 4, the switching status of (2) and (3) always appear in a single switching cycle as long as the duty reference is less than the full duty. Hence, the average values of iL, ic, and io can be obtained in every single switching cycle with the so-called double sampling technique, where the current measurement and controller iteration are executed twice in a switching cycle.

 

III. PERFORMANCE COMPARISON BETWEEN TWO CURRENT FEEDBACK SCHEMES

A. Modeling of the Single-Phase UPS

Fig. 5 shows a control block diagram of a single-phase UPS system. The purpose of the control scheme is to regulate the output voltage vo tracking the voltage reference vo*. To do this, the external voltage controller Gvc(z) and the internal current controller Gic(z) are cascaded. After Gic(z), the output voltage feed-forward term vo_ff is added to reduce the admittance effect of the current loop. In the control structure, the output current feed-forward term io_ff, which is also known as the load current decoupling component, is applied to improve the transient performance. From the view point of the voltage control dynamics, it may be better to use the voltage controller alone. However, the current controller helps to stabilize the voltage control loop by increasing the damping of the entire control system and performing the overcurrent protection feature. Thus, the cascaded control structure is popular in many UPS applications. For the current controller, the inductor current feedback scheme with or without a load current decoupling component can be considered. Note that the inductor current with load current decoupling is basically equivalent to the capacitor current feedback. The digital PWM with a single update, where the voltage reference is commanded once in a switching cycle, can be modeled as a zero-order hold (ZOH) block. Hence, the delay induced by the DPWM is modeled as 0.5Ts, where Ts is the sampling period. By considering this delay, the inductor current model Gi(z) and the capacitor voltage model Gv(z) are written as follows.

Fig. 5.z-domain control block diagram of the single-phase UPS system with the proposed SCST.

On the other hand, the computation delay from the iteration of the software routine in the digital controller is modeled as z-1. Consequently, the entire digital delay, including the DPWM and the computation delays, is considered to be 1.5Ts. By assuming 10 kHz of the sampling frequency, this 1.5Ts delay induces 3.24 degrees of phase delay. This small phase difference can be ignored in this analysis. Then, the closed-loop voltage transfer function is represented as:

where:

Physically, Ti(z) means the open-loop current loop gain, and Tv(z) represents the open-loop voltage loop gain neglecting the current loop dynamics. Meanwhile, the closed-loop current loop gain Tcl(z) is written as follows:

B. Analysis of the Current Feedback Methods and Output Impedance

The current error in Fig. 5 is written as:

In (9), the load current decoupling component is multiplied by k. If k is zero, the current error is represented as:

As can be seen in (10), iL subtracted from is the current error ierr. Therefore, it implements the inductor current feedback scheme. On the other hand, ierr is rewritten as (11) with k = 1.

Since the difference between iL and io is the capacitor current ic, (11) implies that the capacitor current feedback scheme is adopted. Equations (10) and (11) clearly indicate both the inductor and the capacitor current feedback schemes can be adjusted by the values of k. Even the mixed current feedback scheme proposed in [21] can be applied. However, it is not dealt with in this paper.

In order to examine the closed-loop output impedance of the voltage loop according to the current feedback methods, define the second term in right-hand-side (RHS) of (6) in the previous subsection as Ze(z) in (12).

It should be noticed that (12) is the closed-loop output impedance of the voltage loop. Using (7) and (8), (12) can be rewritten as:

Decompose (13) as follows:

The frequency response of (14) is not affected by k, but by the system parameters and the voltage and current controllers. However, (15) includes k, which means that the frequency response of (15) is changed by k. Then, (15) is rewritten as follows:

Consequently, it is supposed that Zek(z) is the transfer function which decides the characteristics of Ze(z) depending on k. Note that (16) and (17) are the negative inverses of the closed-loop current loop gain Tcl(z) and the open-loop current loop gain Ti(z).

Fig. 6 compares the frequency responses of Zek(z) with different k. For convenience, the bandwidth of the current controller is assumed to be 1 kHz. In the high frequency region over the crossover frequency fc, both responses are almost identical. However, apparently, the case with k = 1 shows a lower magnitude than the case with k = 0 under fc. This means that the former case, where k is 1 so that the load current is decoupled, achieves a lower closed-loop output impedance for harmonic frequency ranges that are less than fc. Hence, in the capacitor current feedback method, the effect of the load current io is lower than that in the case of the inductor current sampling method. As a result, it is supposed that the former reduces the effect of the disturbance transfer function, and that it improves the performance of the output voltage regulation.

Fig. 6.Frequency responses of Zek(z) with different k.

C. Numerical Analysis of the Output Impedance

In order to compare the effects of the current feedback methods on the closed-loop control, a numerical analysis is performed. The parameters shown in Table I are utilized for this analysis. Using the K-factor design methodology, the current and voltage controllers, Gic(z) and Gvc(z), are given as follows:

TABLE IPARAMETERS FOR THE ANALYSIS

By substituting (18) and (19) into (7), the crossover frequencies of the current and the voltage control loops are obtained as 1 kHz and 800 Hz, respectively. If the current control loop dynamics are considered, the crossover frequency of the voltage loop can be slightly reduced. The phase margins of both of the control loops are selected as 60 degrees. The closed-loop output impedance of the system is evaluated, as shown in Fig. 7, using (18), (19), and (10) in the previous subsection. In Fig. 7, when k is zero so that there is no output current decoupling, and the inductor current feedback is utilized, the magnitude of Ze(z) at the fundamental frequency 60 Hz is about 1.1 dB. Meanwhile, when k = 1, the magnitude at that frequency is about -26.0 dB. This means that the effect of the output load current toward to the output voltage is almost 22 times higher than that with only the inductor current feedback scheme. Hence, the effect of the disturbance io is less in the capacitor current feedback. This trend is also the same at harmonic frequency regions up to 1 kHz. Over 1 kHz, the magnitude is similar. However, it is not that important because these high order harmonics are much less common than the low frequency harmonics in practical systems.

Fig. 7.Frequency responses of the closed-loop output impedance Ze(z).

 

IV. IMPLEMENTATION ISSUES

In the proposed technique, several implementation issues should be considered to reconstruct the inductor and the load current effectively.

First, a minimum time Tmin is necessary to completely reconstruct the load and inductor current. Here, Tmin corresponds the sum of the settling time Ttr and the analog to digital conversion (ADC) time Tad. From this, the minimum duty width dmw is derived from Tmin and the switching frequency fsw as follows:

where fsw is 10 kHz and Tmin is 5us (Ttr = 2us, Tad = 3us) in this paper. By considering this condition, dmw should be more than 0.05 for complete reconstruction. If the duty reference d or (1–d) is less than dmw, the sampled current isen may be misread as can be seen in Fig. 8(a). Accordingly, the duty reference should be strictly limited to between 0.05 and 0.95. However, as long as the dc-link voltage is high enough, this restriction is no longer a disadvantage in inverter applications, because their duty reference changes at around 0.5.

Fig. 8.Practical issues for complete reconstruction. (a) The minimum duty width for exact measurement. (b) The sampling delay according to the combination of the measuring points.

Second, in Fig. 2, the insertion of a current sensor may increase the stray inductance of the switching branch. Therefore, some sensitive switching devices may require a strong snubber circuit to remove the voltage spikes at each switching instant. If a non-contact type current sensor or a GMR sensor [22] is employed or if the circuit layout is optimized, this effect can be minimized.

Third, in practice, a half sample delay occurs between the two sampled current values, isen_valley and isen_peak, because the output of the current is sampled at the peak and valley of the carrier in sequence, where the time difference is existent. Accordingly, there may be a little difference between the actual current and the reconstructed currents. To mitigate this issue, the sampling point can be rearranged as in Fig. 8(b). By doing this, only a quarter of a sample delay is necessary. This corresponds 0.54 deg of phase difference, which is almost negligible. Still, the average current is measured. If a current prediction algorithm [23], [24] is incorporated with this, practically no sampling delay can be expected. However, this subject is beyond the scope of this paper.

Finally, to implement the proposed sensing method, a high bandwidth current sensor should be equipped, because the chopped branch current is measured. In addition, the rating of the current sensor should be twice the inductor current as shown in Fig. 3. Although the cost of the current sensor is slightly increased, the proposed method does not have the non-uniform gain problem from employing multiple current sensors.

 

V. SIMULATION AND EXPERIMENTAL RESULTS

A. Simulation Results

To verify the proposed technique, the simulation software package PSIM is used. The parameters in Table I are utilized for both the simulation and the experiments. It should be pointed out that, in addition to implementing the proposed SCST, the so-called double sampling technique has been applied to improve the control performance. For the simulation, both the linear and the nonlinear loads shown in Fig. 9 are employed. Fig. 10 illustrates the simulation waveforms of the proposed sensing and reconstruction method. Figs. 10(a) and (b) show the current sensor output isensing, the actual inductor iL and the output current io. In Fig. 10(b), it is supposed that information on both iL and io can be obtained from isensing. Fig. 10(c) compares the actual and the reconstructed current values, where the inductor and the load currents are represented as iL_recon and io_recon, respectively. From the simulation results, it is confirmed that the average values of io and iL are accurately obtained using the proposed method.

Fig. 9.The load configuration. (a) linear load, (b) nonlinear load.

Fig. 10.Simulation waveforms of the proposed sensing and reconstruction technique. (a) io, iL, and isensing. (b) Zoom in waveforms of (a). (c) Actual and reconstructed currents

Fig. 11 compares the steady-state voltage control performance with different k values and current feedback schemes under the linear load shown in Fig. 9(a). As shown in this figure, the load current and the output voltage of the inverter are almost perfectly sinusoidal in all of the cases. However, the voltage errors between the reference and the output voltage at the bottom of the figure are different in each case. In Fig. 11(a), the maximum voltage error is evaluated as ±25V with the inductor current feedback. On the other hand, it is less than ±15V with the capacitor current feedback and the proposed reconstruction scheme as represented in Figs. 12(b) and (c). As can be seen in the figures, the performance of the proposed current reconstruction method almost matches the actual current sensing scheme where two current sensors are employed.

Fig. 11.Simulation result with the linear load. (a) inductor current feedback (b) capacitor current feedback (c) proposed reconstruction method.

Fig. 12.Simulation result with the nonlinear load. (a) inductor current feedback (b) capacitor current feedback (c) proposed reconstruction method.

Similar evaluations have been performed for a nonlinear load, and their results are illustrated in Fig. 12. It can be seen that the voltage regulation performance with the capacitor current feedback and the proposed reconstruction method are excellent. Again, the proposed current sensing method shows a lower voltage fluctuation. With the inductor current feedback, the total harmonic distortion (THD) of the output voltage is evaluated as 6.4 %, whereas it is measured as 2.9% with the capacitor current feedback and the proposed current sensing method.

B. Experimental Results

In order to verify the performance of the proposed methods, a 3kVA single-phase UPS prototype was built. The proposed current reconstruction technique and the current feedback methods are simultaneously implemented with a Texas Instruments 32-bit floating point digital signal processor (DSP) TMS320F28335. For current sensing, a LEM’s LA55-P is employed whose bandwidth and accuracy are 200 kHz and 0.65 percent at the normal operating temperature. The internal before, the inductor and the load currents are reconstructed by isensing at the peak and valley points of the carrier. A comparison between the actual and the reconstructed currents in six cycles variables of the DSP are displayed on an oscilloscope through a 12-bit digital-to-analog converter (DAC). Again, the parameters in Table I are adopted in the experiments.

Fig. 13 shows the experimental results of the proposed current reconstruction method. Here, isensing(DAC) is the monitored current of isensing using the DAC. In Fig. 13(a), it can be seen that isensing(DAC) contains the information of iL and io. The zoomed-in waveforms are shown in Fig. 13(b). As analyzed is presented in Fig. 13(c). From these figures, it is confirmed that the proposed current SCST performed very well in obtaining iL and io in the average manner.

Fig. 13.Experimental waveforms of the proposed sensing and reconstruction technique. (a) io, iL, and isensing(DAC), (b) sampling points of isensing for reconstruction, (c) Actual and reconstructed currents of the inductor and the load.

The output voltage characteristics of the UPS are compared in Figs. 14 and 15, with the different current feedback methods. Fig. 14 illustrates the experimental waveforms with a linear load. In Fig. 14(a), the inductor current feedback method is employed, and the voltage error is in the range of ±25V. The maximum voltage error in Fig. 14(b), where the capacitor current feedback is applied with the actual current measurement, is evaluated as ±15V. Fig. 14(c) shows the voltage control performance with the capacitor current feedback and the proposed current reconstruction method. The results are very similar to those of the actual current sensing.

Fig. 14.Experimental waveforms with the linear load. (a) the inductor current feedback (b) the capacitor current feedback (c) the proposed reconstruction method with the capacitor current feedback.

Fig. 15.Experimental waveforms with the non-linear load. (a) the inductor current feedback (b) the capacitor current feedback (c) the propose reconstruction method with the capacitor current feedback.

The experimental waveforms with a nonlinear load in Fig. 9(b) are shown in Fig. 15. This also shows that the results are similar to the simulation results. In the case of Fig. 15(a), the THD of the output voltage is measured as 5.4 %, whereas it is measured as 3.4% and 3.5% in Fig. 15(b) and Fig. 15(c). Consequently, it is verified that the proposed reconstruction method has an output characteristic that is similar to that of the actual current sensing method.

In order to show the dynamic characteristics of the proposed SCST, the step responses are shown in Fig. 16. This compares the transient responses of the proposed reconstruction method. The no load condition is assumed at the beginning of the experiment. After that, linear and nonlinear loads are connected in step at the peak of the output voltage to assume the worst case. The output voltage is stabilized in a half cycle. Hence, the stable operation of the designed digital controller is confirmed under the no load and the full load conditions.

Fig. 16.The step response waveform of the proposed reconstruction method (a) linear load, (b) nonlinear load.

 

VI. CONCLUSION

This paper proposes a SCST for full-bridge inverter applications where an LC filter is employed. In the proposed method, the load current is measured at the same time as a particular branch current at either the peak or the valley point of the PWM carrier. Using the proposed method, all of the branches’ currents in the LC filter can be measured, and a high reliability and a fast dynamic performance can be achieved. In addition, concrete evidence of the performance difference has been shown between the inductor and the capacitor current feedback methods from an analysis of the proposed output impedance model.

The important results are summarized as follows:

The proposed method has been verified by simulation and experimental results using 3kVA single phase UPSs.