A Study on the Characteristics of Si-$SiO_2$ interface in Short channel SONOSFET Nonvolatile Memories

Short channel SONOSFET 비휘발성 기억소자의 Si-$SiO_2$ 계면특성에 관한 연구

  • Kim, Hwa-Mok (Dept. of Elctronic Materials Engineering, Kwangwoon Univ.) ;
  • Yi, Sang-Bae (Dept. of Elctronic Materials Engineering, Kwangwoon Univ.) ;
  • Seo, Kwang-Yell (Dept. of Elctronic Materials Engineering, Kwangwoon Univ.) ;
  • Kang, Chang-Su (Dept. of Electronics, Yuhan College)
  • 김화목 (광운대학교 전자재료공학과) ;
  • 이상배 (광운대학교 전자재료공학과) ;
  • 서광열 (광운대학교 전자재료공학과) ;
  • 강창수 (유한전문대학 전자과)
  • Published : 1993.07.18

Abstract

In this study, the characteristics of Si-$SiO_2$ interface and its degradation in short channel SONOSFET nonvolatile memory devices, fabricated by 1Mbit CMOS process($1.2{\mu}m$ design rule), with $65{\AA}$ blocking oxide layer, $205{\AA}$ nitride layer, and $30{\AA}$ tunneling oxide layer on the silicon wafer were investigated using the charge pumping method. For investigating the Si-$SiO_2$ interface characteristics before and after write/erase cycling, charge pumping current characteristics with frequencies, write/erase cycles, as a parameters, were measured. As a result, average Si-$SiO_2$ interface trap density and mean value of capture cross section were determined to be $1.203{\times}10^{11}cm^{-2}eV^{-1}\;and\;2.091{\times}10^{16}cm^2$ before write/erase cycling, respectively. After cycling, when the write/erase cycles are $10^4$, average $Si-SiO_2$ interface trap density was $1.901{\times}10^{11}cm^{-2}eV^{-1}$. Incresing write/erase cycles beyond about $10^4$, Si-$SiO_2$ interface characteristics with write/erase cycles was increased logarithmically.

Keywords