한국정보디스플레이학회:학술대회논문집
- 한국정보디스플레이학회 2000년도 제1회 학술대회 논문집
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- Pages.67-68
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- 2000
Improvement in Electrical Stability of poly-Si TFT Employing Vertical a-Si Offsets
- Park, J.W. (School of Electrical Engineering, Seoul National University) ;
- Park, K.C. (School of Electrical Engineering, Seoul National University) ;
- Han, M.K. (School of Electrical Engineering, Seoul National University)
- 발행 : 2000.01.13
초록
Polycrystalline silicon (poly-Si) thin film transistors (TFT's) employing vertical amorphous silicon (a-Si) offsets have been fabricated without additional photolithography processes. The a-Si offset has been formed utilizing the poly-Si grain growth blocking effect by thin native oxide film during the excimer laser recrystallization of a-Si. The ON current degradation of the new device after 4 hour's electrical stress was reduced by 5 times compared with conventional poly-Si TFT's.
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