DOI QR코드

DOI QR Code

A Study on Fault History Management Equipment of Unmanned Aerial Systems

무인항공기 체계의 고장이력관리장비에 관한 연구

  • Received : 2019.03.05
  • Accepted : 2019.05.24
  • Published : 2019.06.30

Abstract

This paper presents a study on Fault History Management Equipment (FHME) of Unmanned Aerial Systems (UAS). UAS comprise of various types of electronic equipment for high reliability design for flight safety. Consequently, it is mandatory for each on-board equipment to have its own Built-In-Test (BIT) function, because rapid fault-detections for UAS are necessary. FHME is developed for the purposes of display, storage and management of such BIT results on ground. This paper describes the outline, development requirements, design and verification process of FHME.

본 논문은 무인항공기 체계(UAS; Unmanned Aerial Systems)의 고장이력관리장비(FHME; Fault History Management Equipment)에 관한 연구를 다룬다. 무인항공기 체계는 비행안전을 위하여 고신뢰성 설계를 기반으로 다양한 전자장비를 탑재하고 있으며, 이에 따른 신속한 고장탐지가 필요하여 각 탑재장비는 BIT(Built-In-Test) 기능을 보유한다. 이러한 BIT 정보를 지상에서 시현, 저장, 관리가 가능하도록 하기 위하여 고장이력관리장비를 개발하였다. 따라서 본 논문에서는 고장이력관리장비의 개요 및 개발 요구사항, 설계 결과, 검증 시험 결과에 대해 기술한다.

Keywords

OJSSBW_2019_v13n3_48_f0001.png 이미지

Fig. 1 Overview of FHME

OJSSBW_2019_v13n3_48_f0002.png 이미지

Fig. 2 Main menu of FHME

OJSSBW_2019_v13n3_48_f0003.png 이미지

Fig. 3 “Air-Vehicle in flight” menu of FHME

OJSSBW_2019_v13n3_48_f0004.png 이미지

Fig. 4 Operation procedure of FHME

OJSSBW_2019_v13n3_48_f0005.png 이미지

Fig. 5 Verification test procedure of FHME

OJSSBW_2019_v13n3_48_f0006.png 이미지

Fig. 6 System Integration Laboratory(SIL) test process of FHME

OJSSBW_2019_v13n3_48_f0007.png 이미지

Fig. 7 Description for on-board equipment interface test of FHME(TC-004)

Table 1 Software requirements of FHME

OJSSBW_2019_v13n3_48_t0001.png 이미지

Table 2 Environment requirements of FHME

OJSSBW_2019_v13n3_48_t0002.png 이미지

Table 3 FHME acceptance test items

OJSSBW_2019_v13n3_48_t0003.png 이미지

Table 4 Acceptance test results of FHME

OJSSBW_2019_v13n3_48_t0004.png 이미지

Table 5 System Integration Laboratory(SIL) test results

OJSSBW_2019_v13n3_48_t0005.png 이미지

Table 6 Items of on-board equipment interface testing

OJSSBW_2019_v13n3_48_t0006.png 이미지

References

  1. J. W. Lim, "A Study on the Safety of Flight(SOF) Assure through Aircraft Diagnostics Systems", Journal of Aerospace System Engineering, vol. 11, no 1, pp. 35-40, 2017 https://doi.org/10.20910/JASE.2017.11.1.35
  2. S. E. Shin, "BIT Design Objective and Verification Method in UAV System Development", Avionics Systems Symposium Korea 2015, vol. 2015, pp. 347-354, July. 2015
  3. J. S. Kim, S. Y. Yang, J. P. Han, "The BIT Design for Identifying Malfunction in Avionics", 2014 KSAS fall Conference, November. 2014
  4. D. W. Yoo, S. M. Cho, H. S. Ha, K. M. Cho, "System Integration Test Environment Setup and Testing Method for Interface Verification of Unmanned Aerial Systems", 2018 KIMST Conference, pp. 2155-2156, June. 2018
  5. S. M. Cho, D. W. Yoo, J. I. Shim, H. S. Ha, "Environment Design and Verification Test Method of System Integration Lab for UAS", 2018 KIMST Conference, pp. 2153-2154, June. 2018