• 센서학회지
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• 제28권2호
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• pp.121-126
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• 2019

The voltage-controlled oscillator is one of the fundamental building blocks that determine the signal quality and power consumption in RF transceivers for wireless sensor networks. Ring oscillators are attractive owing to their small form factor and multi-phase capability despite the relatively poor phase noise performance in comparison with LC oscillators. The phase noise of a ring oscillator can be improved by using a coupled structure that works at a lower frequency. This paper introduces a 2.4 GHz low-noise ring oscillator that consists of two 3-stage coupled ring oscillators. Each sub-oscillator operates at 800 MHz, and the multi-phase signals are combined to generate a 2.4 GHz quadrature output. The voltage-controlled ring oscillator designed in a 65-nm standard CMOS technology has a tuning range of 800 MHz and exhibits the phase noise of -104 dBc/Hz at 1 MHz offset. The power consumption is 13.3 mW from a 1.2 V supply voltage.

• 한국ITS학회:학술대회논문집
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• 한국ITS학회 2008년도 제7회 추계학술대회 및 정기총회
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• pp.173-175
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• 2008

• ETRI Journal
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• 제28권4호
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• pp.486-494
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• 2006

Two current-mode and/or voltage-mode quadrature oscillator circuits each using one fully-differential second-generation current conveyor (FDCCII), two grounded capacitors, and two (or three) grounded resistors are presented. In the proposed circuits, the current-mode quadrature signals have the advantage of high-output impedance. The oscillation conditions and oscillation frequencies are orthogonally (or independently) controllable. The current-mode and voltage-mode quadrature signals can be simultaneously obtained from the second proposed circuit. The use of only grounded capacitors and resistors makes the proposed circuits ideal for integrated circuit implementation. Simulation results are also included.

• International Journal of Internet, Broadcasting and Communication
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• 제15권3호
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• pp.122-128
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• 2023

This paper proposes two kinds of single-balanced direct conversion quadrature receivers using selfoscillating LMVs in which the voltage-controlled oscillator (VCO) itself operates as a mixer while generating an oscillation. The two LMVs are complementary coupled and series coupled to generate the quadrature oscillating signals, respectively. Using a 65 nm CMOS technology, the proposed quadrature receivers are designed and simulated. Oscillating at around 2.4 GHz frequency, the complementary coupled quadrature receiver achieves the phase noise of -28 dBc/Hz at 1KHz offset and -109 dBc/Hz at 1 MHz offset frequency. The other series coupled receiver achieves the phase noise of -31 dBc/Hz at 1KHz offset and -109 dBc/Hz at 1 MHz offset frequency. The simulated voltage conversion gain of the two single-balanced receivers is 37 dB and 45 dB, respectively. The double-sideband noise figure of the two receivers is 5.3 dB at 1 MHz offset. The quadrature receivers consume about 440 μW dc power from a 1.0-V supply.

• International journal of advanced smart convergence
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• 제10권3호
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• pp.81-88
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• 2021

This paper proposes two types of subharmonic RF receiver front-end (called LMV) where, in a single stage, quadrature voltage-controlled oscillator (QVCO) is stacked on top of a low noise amplifier. Since the QVCO itself plays the role of the single-balanced subharmonic mixer with the dc current reuse technique by stacking, the proposed topology can remove the RF mixer component in the RF front-end and thus reduce the chip size and the power consumption. Another advantage of the proposed topologies is that many challenges of the direct conversion receiver can be easily evaded with the subharmonic mixing in the QVCO itself. The intermediate frequency signal can be directly extracted at the center taps of the two inductors of the QVCO. Using a 65 nm complementary metal oxide semiconductor (CMOS) technology, the proposed subharmonic RF front-ends are designed. Oscillating at around 2.4 GHz band, the proposed subharmonic LMVs are compared in terms of phase noise, voltage conversion gain and double sideband noise figure. The subharmonic LMVs consume about 330 ㎼ dc power from a 1-V supply.

• 한국광학회:학술대회논문집
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• 한국광학회 2001년도 제12회 정기총회 및 01년도 동계학술발표회
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• pp.248-249
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• 2001

A quantum-mechanical harmonic oscillator undergoes continuous amplitude fluctuation even in its ground state. This fluctuation, also known as the vacuum fluctuation, arises from the nonvanishing commutation .elation, [${\alpha}$, ${\alpha}$$\^$＋/] = 1, where ${\alpha}$(${\alpha}$$\^$＋/) is the annihilation (creation) operate. of the harmonic oscillator, One can make, however, the fluctuation of one quadrature amplitude decrease below the vacuum-state (or the coherent state) level at the cost of that of the other quadrature. (omitted)

• 대한전자공학회논문지SD
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• 제48권2호
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• pp.35-43
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• 2011

본 논문에서는 Quadrature LC VCO(Voltage controlled oscillator)의 I/Q 오차를 분석하고, 그 분석된 결과를 이용하여 I/Q 오차 보정 회로를 제안한다. 제안된 I/Q 오차 보정 회로는 높은 주파수 대역폭을 요구하는 위상 오차 검출기를 사용하는 대신에 낮은 주파수 대역폭으로도 동작이 가능한 진폭 오차 검출기를 사용한다. 제안된 I/Q 오차 보정 회로의 검증을 위하여 2.5GHz Quadrature LC VCO가 $0.18{\mu}m$ CMOS 공정으로 제작 및 측정되었다. 측정결과 제안된 진폭 오차 검출기를 사용해도 기존의 위상 오차 검출기는 사용하는 경우들과 유사한 I/Q 오차 보정 성능을 얻을 수 있음을 확인하였다. 본 I/Q 오차 보정 회로는 1.8V 전원 전압에서 0.4mA 전류를 소모하며, 차지하는 칩 면적은 $0.04mm^2$이다.

• 전자공학회논문지T
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• 제35T권3호
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• pp.113-119
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• 1998

본 논문에서는 직교 동기 검파기를 모델링하여 수치해석을 통한 채널의 이득/위상 불균형등을 고려했을 때와 국부발진누설까지 고려했을 때의 에러측대파 레벨과 신호대 잡음손실의 특성을 알아보았다. 수치해석 결과, 채널 이득/위상 불균형(0.8[㏈]/5[dog])을 고려했을 때와 국부발진누설까지 고려했을 때의 에러측대파 레벨과 신호대 잡음손실은 각각 (-21.322[㏈], -0.0071[㏈]), (-11.6839[㏈], -0.0059[㏈])의 특성을 보였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 추계학술대회 논문집 학회본부
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• pp.461-464
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• 1988

The design of VCO using OTA as active element is discussed in this paper. Several Quadrature oscillator structures ere presented. They use only OTAs and capacitors end are very useful for IC fablication. The frequency of oscillator, $\omega_0$ are proportional to the gm of the OTA and the structures are appropriate for high frequency yea and sinusoidal oscillator operation.

• JSTS:Journal of Semiconductor Technology and Science
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• 제9권3호
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• pp.153-159
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• 2009

A CMOS frequency synthesizer for $5{\sim}6$ GHz UNII-band sub-harmonic direct-conversion receiver has been developed. For quadrature down-conversion with sub-harmonic mixing, octa-phase local oscillator (LO) signals are generated by an integer-N type phase-locked loop (PLL) frequency synthesizer. The complex timing issue of feedback divider of the PLL with large division ratio is solved by using multimodulus prescaler. Phase noise of the local oscillator signal is improved by employing the ring-type LC-tank oscillator and switching its tail current source. Implemented in a $0.18{\mu}m$ CMOS technology, the phase noise of the LO signal is lower than -80 dBc/Hz and -113 dBc/Hz at 100 kHz and 1MHz offset, respect-tively. The measured reference spur is lower than -70 dBc and the power consumption is 40 m W from a 1.8 V supply voltage.