Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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A Low-Voltage Low-Power Delta-Sigma Modulator for Cardiac Pacemaker Applications

심장박동 조절장치를 위한 저전압 저전력 델타 시그마 모듈레이터

  • Chae, Young-Cheol (Department of Electrical and Electronic Eng., Yonsei University) ;
  • Lee, Jeong-Whan (Department of Electrical and Electronic Eng., Yonsei University) ;
  • Lee, In-Hee (Department of Electrical and Electronic Eng., Yonsei University) ;
  • Han, Gun-Hee (Department of Electrical and Electronic Eng., Yonsei University)
  • 채영철 (연세대학교 전기.전자공학과) ;
  • 이정환 (연세대학교 전기.전자공학과) ;
  • 이인희 (연세대학교 전기.전자공학과) ;
  • 한건희 (연세대학교 전기.전자공학과)
  • Published : 2009.01.25
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Abstract

A low voltage, low power delta-sigma modulator is proposed for cardiac pacemaker applications. A cascade of delta-sigma modulator stages that employ a feedforward topology has been used to implement a high-resolution oversampling ADC under the low supply. An inverter-based switched-capacitor circuit technique is used for low-voltage operation and ultra-low power consumption. An experimental prototype of the proposed circuit has been implemented in a $0.35-{\mu}m$ CMOS process, and it achieves 61-dB SNDR, 63-dB SNR, and 65-dB DR for a 120-Hz signal bandwidth at 7.6-kHz sampling frequency. The power consumption is only 280 nW at 1-V power supply.

심장박동 조절장치를 위한 저전압 저전력 델타 시그마 모듈레이터를 제안하였다. 제안된 회로는 feedforward 구조를 이용한 델타 시그마 모듈레이터 단을 계단식 형태로 설계하였으며, 이를 통하여 저전압 환경에서도 비교적 높은 해상도를 구현할 수 있었다. 인버터 기반의 스위치드 커패시터 회로를 이용하여 전력소모를 최소화하고, 낮은 전압에서도 동작 가능하도록 설계되었다. 제안된 회로는 $0.35-{\mu}m$ CMOS 공정을 이용하여 구현되었으며, 샘플링 주파수가 7.6 kHz 이고 120Hz 대역폭에서 61-dB SNDR, 63-dB SNR, 그리고 65-dB DR 을 가진다. 이때 전력소모는 1-V 전원전압에서 280 nW에 불과하다.

Keywords

References

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